On Mon, 2017-02-27 at 17:23 +0100, Daniel Vetter wrote:
> On Mon, Feb 27, 2017 at 12:52:46PM +0100, Philipp Zabel wrote:
> > Some hardware can read the alpha components separately and then
> > conditionally fetch color components only for non-zero alpha values.
> > This patch adds fourcc definition
Hi Eric,
On Mon, 27 Feb 2017 14:30:13 -0800
Eric Anholt wrote:
> Boris Brezillon writes:
>
> > An HLCDC layers in Atmel's nomenclature is either a DRM plane or a 'Post
> > Processing Layer' which can be used to output the results of the HLCDC
> > composition in a memory buffer.
> >
> > atmel_h
On 2017年02月15日 04:32, Daniel Stone
wrote:
Hi John,
On 14 February 2017 at 19:25, John Stultz wrote:
+static enum drm_mode_status
+drm_connector_check_crtc_modes(struct drm_connector *connector,
+ struct drm_display_mode
Hi All,
[Resend this v2 patches, because i have missing TO and CC.]
The dsi + panel is a parental relationship, so OF grpah is not needed.
Therefore, the current dsi_parse_dt function will throw an error,
because there is no linked OF graph for case such as fimd + dsi +
panel.
So the 1/5 patch p
The OF graph is not needed because the panel is a child of dsi. So
Remove the ports node and move burst and esc clock frequency
properties to the parent (DSI node).
Signed-off-by: Hoegeun Kwon
Reviewed-by: Andrzej Hajda
---
arch/arm/boot/dts/exynos3250-rinato.dts | 23 ++-
1
The OF graph is not needed because the panel is a child of dsi. So
Remove the ports node and move burst and esc clock frequency
properties to the parent (DSI node).
Signed-off-by: Hoegeun Kwon
Reviewed-by: Andrzej Hajda
---
arch/arm/boot/dts/exynos4412-trats2.dts | 23 ++-
1
The OF graph is not needed because the panel is a child of dsi. So
Remove the ports node and move burst and esc clock frequency
properties to the parent (DSI node).
Signed-off-by: Hoegeun Kwon
Reviewed-by: Andrzej Hajda
---
arch/arm/boot/dts/exynos4210-trats.dts | 23 ++-
1
The dsi + panel is a parental relationship, so OF grpah is not needed.
Therefore, the current dsi_parse_dt function will throw an error,
because there is no linked OF graph for case such as fimd + dsi +
panel. So this patch parse the Pll, burst and esc clock frequency
properties in dsi_parse_dt and
https://bugzilla.kernel.org/show_bug.cgi?id=194731
Bug ID: 194731
Summary: drm general protection fault in drm_atomic_init
Product: Drivers
Version: 2.5
Kernel Version: 4.10.0
Hardware: x86-64
OS: Linux
Tree:
From: Thierry Reding
SCDC is a mechanism defined in the HDMI 2.0 specification that allows
the source and sink devices to communicate.
This commit introduces helpers to access the SCDC and provides the
symbolic names for the various registers defined in the specification.
V2: Rebase.
V3: Added
HDMI 2.0 spec defines a method to reduce the RF footprint while
operating at higher pixel clocks, which is called Scrambling.
Scrambling can be controlled over a new set of I2C registers
which are accessible over existing DDC I2C lines, called SCDC
register set.
This patch series contains 6 patche
From: Thierry Reding
This patch implements a small function that finds if a
given CEA db is hdmi-forum vendor specific data block
or not.
V2: Rebase.
V3: Added R-B from Jose.
V4: Rebase
V5: Rebase
Signed-off-by: Thierry Reding
Signed-off-by: Shashank Sharma
Reviewed-by: Jose Abreu
---
drive
This patch does following:
- Adds a new structure (drm_hdmi_info) in drm_display_info.
This structure will be used to save and indicate if sink
supports advanced HDMI 2.0 features
- Adds another structure drm_scdc within drm_hdmi_info, to
reflect scdc support and capabilities in connected HDM
This patch does following:
- Adds a new structure (drm_hdmi_info) in drm_display_info.
This structure will be used to save and indicate if sink
supports advanced HDMI 2.0 features
- Adds another structure drm_scdc within drm_hdmi_info, to
reflect scdc support and capabilities in connected HDM
Geminilake platform sports a native HDMI 2.0 controller, and is
capable of driving pixel-clocks upto 594Mhz. HDMI 2.0 spec
mendates scrambling for these higher clocks, for reduced RF footprint.
This patch checks if the monitor supports scrambling, and if required,
enables it during the modeset.
V
Geminilake has a native HDMI 2.0 controller, which is capable of
driving clocks upto 594Mhz. This patch updates the max tmds clock
limit for the same.
V2: rebase
V3: rebase
V4: added r-b from Ander
V5: rebase
Cc: Ander Conselvan De Oliveira
Signed-off-by: Shashank Sharma
Reviewed-by: Ander Cons
The OF graph is not needed because the panel is a child of dsi. So
Remove the ports node and move burst and esc clock frequency
properties to the parent (DSI node).
Signed-off-by: Hoegeun Kwon
Reviewed-by: Andrzej Hajda
---
arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi | 16 ++--
omap_gem_dmabuf_mmap() returns an error (with a WARN) when called for a
buffer which is allocated with dma_alloc_*(). This prevents dmabuf mmap
from working on SoCs without DMM, e.g. AM4 and OMAP3.
I could not find any reason for omap_gem_dmabuf_mmap() rejecting such
buffers, and just removing the
On Tue, Feb 28, 2017 at 04:07:02AM +, Navare, Manasi D wrote:
>
> On Fri, Feb 24, 2017 at 12:09:51PM -0800, Manasi Navare wrote:
> > Hi Daniel,
> >
> > We have ACKs on the userspace design from both Adams and Eric.
> > Is this enough to merge the kernel patches?
> >
> > I spoke to Eric brief
On Thu, Feb 02, 2017 at 09:57:20AM -0800, Eric Anholt wrote:
> Daniel Vetter writes:
>
> > On Wed, Feb 01, 2017 at 11:58:16AM -0800, Eric Anholt wrote:
> >> Jani Nikula writes:
> >>
> >> > On Tue, 31 Jan 2017, Eric Anholt wrote:
> >> >> Martin Peres writes:
> >> >>
> >> >>> Despite all the ca
On Mon, Feb 27, 2017 at 05:46:51PM +, Russell King - ARM Linux wrote:
> On Mon, Feb 27, 2017 at 06:21:05PM +0100, Hans Verkuil wrote:
> > On 02/27/2017 06:04 PM, Russell King - ARM Linux wrote:
> > > I'm afraid that I walked away from this after it became clear that there
> > > was little hope
On Mon, Feb 27, 2017 at 12:11:40PM -0800, Eric Anholt wrote:
> danvet asked me a while ago to try generating documentation with the
> new RST-based infrastructure. I had a couple of hours to do some
> editing, so here it is.
>
> So far I'm not including any kerneldoc for functions. I don't think
On Mon, Feb 27, 2017 at 05:33:30PM -0300, Gabriel Krisman Bertazi wrote:
> If fbdev emulation is disabled, the QXL shutdown path will try to clean
> a framebuffer that wasn't initialized, hitting the Oops below. The
> problem is that even when FBDEV_EMULATION is disabled we allocate the
> qfbdev s
On Mon, Feb 27, 2017 at 09:50:08PM +, Lorenzo Stoakes wrote:
> Moving from get_user_pages() to get_user_pages_unlocked() simplifies the code
> and takes advantage of VM_FAULT_RETRY functionality when faulting in pages.
>
> Signed-off-by: Lorenzo Stoakes
Queued for 4.12, thanks for the patch.
On Mon, Feb 27, 2017 at 05:31:04PM -0800, Joe Perches wrote:
> Use a more common logging style.
>
> Miscellanea:
>
> o Coalesce formats and realign arguments
> o Neaten a few macros now using pr_
>
> Signed-off-by: Joe Perches
I know this is pain, but can you pls split this into:
- amd/radeon
On Mon, 27 Feb 2017 12:28:02 -0800
Eric Anholt wrote:
> The HDMI encoder IP embeds all needed blocks to output audio, with a
> custom DAI called MAI moving audio between the two parts of the HDMI
> core. This driver now exposes a sound card to let users stream audio
> to their display.
>
> Usin
On 02/28/17 09:51, Daniel Vetter wrote:
On Mon, Feb 27, 2017 at 05:46:51PM +, Russell King - ARM Linux wrote:
On Mon, Feb 27, 2017 at 06:21:05PM +0100, Hans Verkuil wrote:
On 02/27/2017 06:04 PM, Russell King - ARM Linux wrote:
I'm afraid that I walked away from this after it became clear
https://bugzilla.kernel.org/show_bug.cgi?id=194731
--- Comment #1 from Michel Dänzer (mic...@daenzer.net) ---
(In reply to Janpieter Sollie from comment #0)
> I modified the drm_atomic.c a bit to be more verbose. the drm_init calls a
> general protection fault when allocating my second GPU(does i
https://bugzilla.kernel.org/show_bug.cgi?id=194731
--- Comment #2 from Janpieter Sollie (janpieter.sol...@dommel.be) ---
an additional post-protection fault which proves it screws up the memory
management of the kernel:
<6>[ 376.340003] general protection fault: [#3] SMP
<6>[ 376.340005] Mo
On Mon, Feb 27, 2017 at 10:03:20PM -0800, John Stultz wrote:
> On Mon, Feb 20, 2017 at 2:32 PM, Daniel Vetter wrote:
> > I thought about this some more, I think what we need to fix this mess
> > properly is:
> > - mode_valid helper callbacks for crtc, encoder, bridges, with the
> > same interface
https://bugzilla.kernel.org/show_bug.cgi?id=194731
--- Comment #3 from Janpieter Sollie (janpieter.sol...@dommel.be) ---
(In reply to Michel Dänzer from comment #1)
> (In reply to Janpieter Sollie from comment #0)
> > I modified the drm_atomic.c a bit to be more verbose. the drm_init calls a
> >
https://bugzilla.kernel.org/show_bug.cgi?id=194559
Janpieter Sollie (janpieter.sol...@dommel.be) changed:
What|Removed |Added
See Also||https://bu
https://bugzilla.kernel.org/show_bug.cgi?id=194731
Janpieter Sollie (janpieter.sol...@dommel.be) changed:
What|Removed |Added
See Also||https://bu
On Tue, Feb 28, 2017 at 10:23:57AM +0100, Hans Verkuil wrote:
> On 02/28/17 09:51, Daniel Vetter wrote:
> > On Mon, Feb 27, 2017 at 05:46:51PM +, Russell King - ARM Linux wrote:
> > > On Mon, Feb 27, 2017 at 06:21:05PM +0100, Hans Verkuil wrote:
> > > > On 02/27/2017 06:04 PM, Russell King - AR
Let's make sure that review doesn't go through needless cycles. Diff
doesn't show this, but this is only for the "small drivers" part of
drm.
Acked-by: Boris Brezillon
Acked-by: Jani Nikula
Signed-off-by: Daniel Vetter
---
drm-misc.rst | 12 +++-
1 file changed, 11 insertions(+), 1 del
On Mo, 2017-02-27 at 17:43 -0300, Gabriel Krisman Bertazi wrote:
> Hi,
>
> This is a resend of the qxl atomic modesetting patchset to include the
> reviewed-by tags from Gustavo and rebase on top of the tip of drm-misc-next.
>
> This series implements support for Atomic Modesetting in the QXL dr
On Mon, 2017-02-27 at 17:25 +0100, Daniel Vetter wrote:
> On Mon, Feb 27, 2017 at 02:14:57PM +0100, Philipp Zabel wrote:
> > Disabling planes will consist of two steps as of the following patch.
> > First, the DP is asked to stop at the next vblank, and then, after the
> > vblank the associated IDM
On 02/24/2017 03:06 PM, Rob Herring wrote:
> On Fri, Feb 24, 2017 at 2:18 AM, Yannick FERTRE wrote:
>>
>>
>> On 02/21/2017 03:07 PM, Rob Herring wrote:
>>> On Mon, Feb 20, 2017 at 5:01 AM, Yannick FERTRE
>>> wrote:
On 02/16/2017 03:34 AM, Rob Herring wrote:
> On Fri, Feb 10,
https://bugzilla.kernel.org/show_bug.cgi?id=194731
--- Comment #4 from Janpieter Sollie (janpieter.sol...@dommel.be) ---
a workaround (and a very dirty one) for the amdgpu-pro driver is to comment, in
line 410, this line: drm_fb_helper_initial_config(&rfbdev->helper, bpp_sel);
after that, the pro-
We've switched to refcounting for the event completion, which means
there's no risk for use-after free anymore after:
commit 24835e442f289813aa568d142a755672a740503c
Author: Daniel Vetter
Date: Wed Dec 21 11:23:30 2016 +0100
drm: reference count event->completion
This should make the comm
On Tue, Feb 28, 2017 at 10:59:54AM +0100, Philipp Zabel wrote:
> On Mon, 2017-02-27 at 17:25 +0100, Daniel Vetter wrote:
> > On Mon, Feb 27, 2017 at 02:14:57PM +0100, Philipp Zabel wrote:
> > > Disabling planes will consist of two steps as of the following patch.
> > > First, the DP is asked to sto
On 28.02.2017 11:11, Daniel Vetter wrote:
> We've switched to refcounting for the event completion, which means
> there's no risk for use-after free anymore after:
>
> commit 24835e442f289813aa568d142a755672a740503c
> Author: Daniel Vetter
> Date: Wed Dec 21 11:23:30 2016 +0100
>
> drm: refe
On Mon, Feb 27, 2017 at 02:57:58PM -0800, clinton.a.tay...@intel.com wrote:
> From: Clint Taylor
>
> P010 is a planar 4:2:0 YUV with interleaved UV plane, 10 bits per
> channel video format. Rockchip's vop support this video format(little
> endian only) as the input video format.
>
> P016 is a p
VBLANK interrupt should be signalled as soon as scanout ends, front porch
is the best moment.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/exynos/exynos_drm_fimd.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
b/drivers/gpu/drm/
Since possible_crtcs are set by Exynos core helper pipe fields have no
raison d'etre. The only place it was used, as a hack, is
fimd_clear_channels, to avoid calling drm_crtc_handle_vblank, but DRM core
has already other protection mechanism (vblank->enabled), so it could be
safely removed.
Signed
On Thu, Feb 23, 2017 at 10:09:27AM -0500, Sean Paul wrote:
> On Tue, Feb 21, 2017 at 02:51:41PM +0100, Maarten Lankhorst wrote:
> > Instead of trying to do everything in 1 go, just do a basic safe
> > conversion first. We've been bitten by too many regressions in the
> > past.
> >
> > This patch o
All Exynos planes are assigned to exactly one CRTC, it allows to simplify
initialization by moving setting of possible_crtcs to exynos_plane_init.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 2 +-
drivers/gpu/drm/exynos/exynos7_drm_decon.c| 2 +-
drivers/
Some people are specifying the username directly in the url with the
following syntax: ssh://@git.freedesktop.org/git/, but
dim expects something like ssh://git.freedesktop.org/git/.
Update the documentation to document how to assign a default username
when connecting to git.freedesktop.org throug
Hi,
On 25/02/17 15:29, Dmitry V. Levin wrote:
> Consistently use types from linux/types.h like in other uapi drm/*_drm.h
> header files to fix the following drm/omap_drm.h userspace compilation
> errors:
>
> /usr/include/drm/omap_drm.h:36:2: error: unknown type name 'uint64_t'
> uint64_t param;
Hi,
On 28 February 2017 at 12:36, Boris Brezillon
wrote:
> @@ -54,6 +54,13 @@ This will also check out the latest maintainer-tools
> branches, so please replace
> the dim you just downloaded with a symlink after this step. And by the way,
> if
> you have improvements for dim, please submit th
Broken up for Daniel Vetter
Joe Perches (3):
gpu: drm: amd/radeon: Convert printk(KERN_ to pr_
gpu: drm: core: Convert printk(KERN_ to pr_
gpu: drm: drivers: Convert printk(KERN_ to pr_
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 3 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_afmt.c
Use a more common logging style.
Miscellanea:
o Coalesce formats and realign arguments
o Neaten a few macros now using pr_
Signed-off-by: Joe Perches
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 3 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_afmt.c | 4 +-
drivers/gpu/drm/amd/
Use a more common logging style.
Miscellanea:
o Coalesce formats and realign arguments
Signed-off-by: Joe Perches
---
drivers/gpu/drm/drm_cache.c | 12 ++--
drivers/gpu/drm/drm_edid.c | 4 ++--
drivers/gpu/drm/drm_ioc32.c | 3 +--
3 files changed, 9 insertions(+), 10 deletions(-)
d
Use a more common logging style.
Miscellanea:
o Coalesce formats and realign arguments
o Neaten a few macros now using pr_
Signed-off-by: Joe Perches
---
drivers/gpu/drm/gma500/cdv_intel_lvds.c | 9 -
drivers/gpu/drm/gma500/oaktrail_lvds.c| 18 +-
drivers
Move the DPOunit clock gate workaround to directly after the PLL enable.
The exact location of the workaround does not matter and there are 2
reasons to group it with the PLL enable:
1) This moves it out of the middle of the init sequence from the spec,
making it easier to follow the init sequ
Document the DSI panel enable / disable sequences from the spec,
for easy comparison between the code and the spec.
Signed-off-by: Hans de Goede
Acked-by: Jani Nikula
---
Changes in v2:
-Make the comment a table with 3 columns for easier comparison of the
3 sequences
---
drivers/gpu/drm/i915/i
Now that we are no longer bound to the drm_panel_ callbacks, call
MIPI_SEQ_POWER_ON/OFF at the proper place.
Signed-off-by: Hans de Goede
Reviewed-by: Bob Paauwe
---
drivers/gpu/drm/i915/intel_dsi.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i
According to the spec for v2 VBTs we should call MIPI_SEQ_DISPLAY_OFF
before sending SHUTDOWN, where as for v3 VBTs we should send SHUTDOWN
first.
Since the v2 order has known issues, we use the v3 order everywhere,
add a comment documenting this.
Signed-off-by: Hans de Goede
---
Changes in v2:
intel_dsi_post_disable(), which does the MIPI_SEQ_ASSERT_RESET,
will always be called at some point before intel_dsi_pre_enable()
making the MIPI_SEQ_ASSERT_RESET in intel_dsi_pre_enable() redundant.
In addition, calling MIPI_SEQ_ASSERT_RESET in the enable path goes
against the VBT spec.
Signed-o
Execute the MIPI_SEQ_BACKLIGHT_ON/OFF VBT sequences at the same time as
we call intel_panel_enable_backlight() / intel_panel_disable_backlight().
Signed-off-by: Hans de Goede
Reviewed-by: Bob Paauwe
---
Changes in v2:
-Drop meaningless code-comments
---
drivers/gpu/drm/i915/intel_dsi.c | 4 ++--
For v3+ VBTs we should call MIPI_SEQ_TEAR_OFF before MIPI_SEQ_DISPLAY_OFF,
v2 VBTs do not have MIPI_SEQ_TEAR_OFF so there this is a nop.
Signed-off-by: Hans de Goede
---
Changes in v2:
-Only call MIPI_SEQ_TEAR_OFF in cmd mode
---
drivers/gpu/drm/i915/intel_dsi.c | 2 ++
1 file changed, 2 inserti
Execute MIPI_SEQ_DEASSERT_RESET before putting the device in ready
state (LP-11), this is the sequence in which things should be done
according to the spec.
Signed-off-by: Hans de Goede
Reviewed-by: Bob Paauwe
---
drivers/gpu/drm/i915/intel_dsi.c | 9 +++--
1 file changed, 7 insertions(+),
For v3 VBTs in vid-mode the delays are part of the VBT sequences, so
we should not also delay ourselves otherwise we get double delays.
Signed-off-by: Hans de Goede
Reviewed-by: Bob Paauwe
---
drivers/gpu/drm/i915/intel_dsi.c | 19 +++
1 file changed, 15 insertions(+), 4 deletio
According to the spec we should call MIPI_SEQ_TEAR_ON and DISPLAY_ON
on enable for cmd-mode, just like we already call their counterparts
on disable. Note: untested, my panel is a vid-mode panel.
Signed-off-by: Hans de Goede
Reviewed-by: Bob Paauwe
---
drivers/gpu/drm/i915/intel_dsi.c | 2 ++
1
27.02.2017, 15:30, "Rob Clark":> On Mon, Feb 27, 2017 at 1:41 AM, Andrey Ponomarenko:>> 26.02.2017, 22:15, "Daniel Vetter":>>> On Sun, Feb 26, 2017 at 10:51 AM, Andrey Ponomarenko: Hello, I'd like to present the ABI Navigator project to search for binary symbols (functions, global
On Tue, 2017-02-28 at 12:45 +0100, Daniel Vetter wrote:
> On Tue, Feb 28, 2017 at 10:59:54AM +0100, Philipp Zabel wrote:
> > On Mon, 2017-02-27 at 17:25 +0100, Daniel Vetter wrote:
> > > On Mon, Feb 27, 2017 at 02:14:57PM +0100, Philipp Zabel wrote:
> > > > Disabling planes will consist of two step
On Tue, Feb 28, 2017 at 12:50:57PM +, Daniel Stone wrote:
> Hi,
>
> On 28 February 2017 at 12:36, Boris Brezillon
> wrote:
> > @@ -54,6 +54,13 @@ This will also check out the latest maintainer-tools
> > branches, so please replace
> > the dim you just downloaded with a symlink after this st
On Mo, 2017-02-27 at 17:43 -0300, Gabriel Krisman Bertazi wrote:
> Hi,
>
> This is a resend of the qxl atomic modesetting patchset to include the
> reviewed-by tags from Gustavo and rebase on top of the tip of drm-misc-next.
>
> This series implements support for Atomic Modesetting in the QXL dr
On Tue, Feb 28, 2017 at 04:55:51AM -0800, Joe Perches wrote:
> Broken up for Daniel Vetter
Thanks, I applied the core patch (needed a minor resolution in
drm_edid.c). I'll wait with the driver patch for a few more acks maybe,
and leave the 2 other patches to Alex for picking up directly.
Thanks,
Allow to calculate EBA for planes other than plane 0. This is in
preparation for the following patch, which adds support for separate
alpha planes.
Signed-off-by: Philipp Zabel
---
drivers/gpu/drm/imx/ipuv3-plane.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --gi
The IPUv3 can read 8-bit alpha values from a separate IDMAC channel driven
by the Alpha Transparency Controller (ATC) for the graphics IDMAC channels.
This allows to reduce memory bandwidth via a conditional read mechanism or
to support planar YUV formats with alpha transparency.
Signed-off-by: Ph
Some hardware can read the alpha components separately and then
conditionally fetch color components only for non-zero alpha values.
This patch adds fourcc definitions for two-plane RGB formats with an
8-bit alpha channel on a second plane.
Signed-off-by: Philipp Zabel
---
Changes since v1:
- Ad
The IPUv3 can read 8-bit alpha values from a separate plane buffer using
a companion IDMAC channel driven by the Alpha Transparency Controller
(ATC) for the graphics channels. The conditional read mechanism allows
to reduce memory bandwidth by skipping reads of color data for
completely transparent
The DP (display processor) channel disable code tried to busy wait for
the DP sync flow end interrupt status bit when disabling the partial
plane without a full modeset. That never worked reliably, and it was
disabled completely by the recent "gpu: ipu-v3: remove IRQ dance on DC
channel disable" pa
When disabling the foreground DP channel during a modeset, the DC is
already disabled without waiting for end of frame. There is no reason
to wait for a frame boundary before updating the DP registers in that
case.
Add support to apply updates immediately. No functional changes, yet.
Signed-off-by
Hi,
third try. This time I've removed the drm_atomic_helper_wait_for_vblanks
call from imx_drm_commit_tail unless there are planes to be disabled.
Also the drm_atomic_helper_cleanup_planes call is removed, as that is
a no-op for CMA framebuffer based drivers.
This series fixes an issue with the I
drm_atomic_helper_cleanup_planes only calls the cleanup_fb plane
helpers, which we don't implement as a CMA framebuffer based driver.
There is no reason to wait for vblanks in commit_tail only to do nothing
afterwards.
Signed-off-by: Philipp Zabel
---
Changes since v2:
- New patch that removes w
From: Lucas Stach
This has never worked properly, as the IRQ got retriggered immediately
on unmask. Remove the IRQ wait dance, as it is apparently safe to disable
the DC channel at any point in time.
Signed-off-by: Lucas Stach
Signed-off-by: Philipp Zabel
---
drivers/gpu/ipu-v3/ipu-dc.c | 61
On Tue, Feb 28, 2017 at 4:07 AM, Yannick FERTRE wrote:
> On 02/24/2017 03:06 PM, Rob Herring wrote:
>> On Fri, Feb 24, 2017 at 2:18 AM, Yannick FERTRE
>> wrote:
>>> On 02/21/2017 03:07 PM, Rob Herring wrote:
On Mon, Feb 20, 2017 at 5:01 AM, Yannick FERTRE
wrote:
> On 02/16/2017 0
Hi!
mplayer stopped working after a while. Dmesg says:
[ 3000.266533] cdc_ether 2-1.2:1.0 usb0: register 'cdc_ether' at
usb-:00:1d.0-1.2, CDC Ethernet Device, 22:1b:e4:4e:56:f5
[ 3190.767227] [drm] GPU HANG: ecode 6:0:0xbb409fff, in chromium
[4597], reason: Hang on render ring, action: reset
From: Thierry Reding
For consistency with other reference counting APIs in the kernel, add
drm_framebuffer_get() and drm_framebuffer_put() to reference count DRM
framebuffers.
Compatibility aliases are added to keep existing code working. To help
speed up the transition, all the instances of the
From: Thierry Reding
Currently the functions that initialize and tear down a connector
iterator use the _get() and _put() suffixes. However, these suffixes
are typically used by reference counting functions.
Make these function names a little more consistent by changing the
suffixes to _begin()
From: Thierry Reding
For consistency with other reference counting APIs in the kernel, add
drm_mode_object_get() and drm_mode_object_put() to reference count DRM
mode objects.
Compatibility aliases are added to keep existing code working. To help
speed up the transition, all the instances of the
From: Thierry Reding
For consistency with other reference counting APIs in the kernel, add
drm_connector_get() and drm_connector_put() functions to reference count
connectors.
Compatibility aliases are added to keep existing code working. To help
speed up the transition, all the instances of the
From: Thierry Reding
For consistency with other reference counting APIs in the kernel, add
drm_gem_object_get() and drm_gem_object_put(), as well as an unlocked
variant of the latter, to reference count GEM buffer objects.
Compatibility aliases are added to keep existing code working. To help
sp
From: Thierry Reding
This series introduces DRM reference counting APIs that are consistent
with other reference counting APIs in the kernel. They are also much
shorter. Compatibility aliases are added to keep existing code working
and will stay in place until all users of the old APIs are gone.
From: Thierry Reding
For consistency with other reference counting APIs in the kernel, add
drm_property_blob_get() and drm_property_blob_put() to reference count
DRM blob properties.
Compatibility aliases are added to keep existing code working. To help
speed up the transition, all the instances
From: Thierry Reding
Subsequent patches will introduce reference counting APIs that are more
consistent with similar APIs throughout the Linux kernel. These APIs use
the _get() and _put() suffixes and will collide with this existing
function.
Rename the function to drm_mode_object_add() which is
On Di, 2017-02-28 at 14:29 +0100, Gerd Hoffmann wrote:
> On Mo, 2017-02-27 at 17:43 -0300, Gabriel Krisman Bertazi wrote:
> > Hi,
> >
> > This is a resend of the qxl atomic modesetting patchset to include the
> > reviewed-by tags from Gustavo and rebase on top of the tip of drm-misc-next.
> >
>
On Tue, Feb 28, 2017 at 03:34:53PM +0100, Pavel Machek wrote:
> Hi!
>
> mplayer stopped working after a while. Dmesg says:
>
> [ 3000.266533] cdc_ether 2-1.2:1.0 usb0: register 'cdc_ether' at
> usb-:00:1d.0-1.2, CDC Ethernet Device, 22:1b:e4:4e:56:f5
> [ 3190.767227] [drm] GPU HANG: ecode 6:0
https://bugs.freedesktop.org/show_bug.cgi?id=97590
--- Comment #15 from Alex Deucher ---
(In reply to Vedran Miletić from comment #14)
> (In reply to Adam Bolte from comment #9)
> > The only difference between this patch and the Windows behaviour is with the
> > second card at idle - Windows will
On Tue, Feb 28, 2017 at 8:11 AM, Andrey Ponomarenko
wrote:
> 27.02.2017, 15:30, "Rob Clark":
>> On Mon, Feb 27, 2017 at 1:41 AM, Andrey Ponomarenko:
>>> 26.02.2017, 22:15, "Daniel Vetter":
On Sun, Feb 26, 2017 at 10:51 AM, Andrey Ponomarenko:
> Hello,
>
> I'd like to present
Implement legacy framebuffer ioctl FBIO_WAITFORVSYNC in the generic
framebuffer emulation driver. Legacy framebuffer users like non kms/drm
based OpenGL(ES)/EGL implementations may require the ioctl to
synchronize drawing or buffer flip for double buffering. It is tested on
the i.MX6.
Signed-off-b
Hi,
This is a respin of the previous serie called "Support fast framebuffer
panning for i.MX6" made by Stefan 6 monthes ago. The imx6 bits have been
removed, and the comments that were made at that time fixed (hopefully).
Let me know what you think,
Maxime
Changes from v3:
- Dropped the overal
https://bugs.freedesktop.org/show_bug.cgi?id=99850
Samuel Pitoiset changed:
What|Removed |Added
Resolution|--- |FIXED
Status|REOPENED
On 02/28/2017 03:56 AM, Ville Syrjälä wrote:
On Mon, Feb 27, 2017 at 02:57:58PM -0800, clinton.a.tay...@intel.com wrote:
From: Clint Taylor
P010 is a planar 4:2:0 YUV with interleaved UV plane, 10 bits per
channel video format. Rockchip's vop support this video format(little
endian only) as th
On Tue, Feb 28, 2017 at 08:08:55AM -0800, Clint Taylor wrote:
> On 02/28/2017 03:56 AM, Ville Syrjälä wrote:
> > On Mon, Feb 27, 2017 at 02:57:58PM -0800, clinton.a.tay...@intel.com wrote:
> >> From: Clint Taylor
> >>
> >> P010 is a planar 4:2:0 YUV with interleaved UV plane, 10 bits per
> >> chan
Hi,
> Patches look good, great job. I'll go run some more tests and if all
> goes fine I'll push to drm-misc-next.
Ok, cool, text console, xorg and wayland all work fine without glitches.
Series pushed.
thanks,
Gerd
___
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dr
On 02/28/2017 02:58 AM, ayaka wrote:
On 02/28/2017 06:57 AM, clinton.a.tay...@intel.com wrote:
From: Clint Taylor
P010 is a planar 4:2:0 YUV with interleaved UV plane, 10 bits per
channel video format. Rockchip's vop support this video format(little
endian only) as the input video format.
P
https://bugzilla.kernel.org/show_bug.cgi?id=193341
--- Comment #7 from stefan.ko...@um.si ---
Created attachment 254989
--> https://bugzilla.kernel.org/attachment.cgi?id=254989&action=edit
Dmesg of 4.10.1-1-ARCH #1 SMP PREEMPT Sun Feb 26 21:08:53 UTC 2017 x86_64
GNU/Linux
I'm not sure if all a
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