Commit 25d3db7600b8 ("mm, fs: reduce fault, page_mkwrite, and pfn_mkwrite
to take only vmf") changes the signature of the .fault hook. Update the
armada_gem_vm_fault() function to match.
Fixes: 25d3db7600b8 (mm, fs: reduce fault, page_mkwrite, and pfn_mkwrite to
take only vmf)
Cc: Dave Jiang
Cc:
2017-01-31 19:56 GMT+01:00 Liviu Dudau :
> etnaviv_gem.h header gets included twice. Remove duplicate.
>
> Signed-off-by: Liviu Dudau
Reviewed-by: Christian Gmeiner
> ---
> drivers/gpu/drm/etnaviv/etnaviv_drv.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/etnaviv/etn
On Sun, Jan 29, 2017 at 01:24:37PM +, John Keeping wrote:
> The multiplication ratio for the PLL is required to be even due to the
> use of a "by 2 pre-scaler". Currently we are likely to end up with an
> odd multiplier even though there is an equivalent set of parameters with
> an even multip
On Sun, Jan 29, 2017 at 01:24:39PM +, John Keeping wrote:
> This matches other drivers.
>
Reviewed-by: Sean Paul
> Signed-off-by: John Keeping
> ---
> Unchanged in v3
> Unchanged in v2
>
> drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
On Sun, Jan 29, 2017 at 01:24:41PM +, John Keeping wrote:
> This ensures that the output resolution is known before fbcon loads.
>
> Signed-off-by: John Keeping
> ---
> Unchanged in v3
> Unchanged in v2
>
> drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 11 +--
> 1 file changed, 9 inserti
On Sun, Jan 29, 2017 at 01:24:40PM +, John Keeping wrote:
> When connected to the MIPI DSI output, we need to use N{H,V}SYNC for the
> internal connection but these flags are meaningless for DSI panels.
> Switch the test so that we do not set the P{H,V}SYNC bits unless the
> mode requires it.
>
On Sun, Jan 29, 2017 at 01:24:42PM +, John Keeping wrote:
Reviewed-by: Sean Paul
> Signed-off-by: John Keeping
> Reviewed-by: Chris Zhong
> ---
> v3:
> - Add Chris' Reviewed-by
> Unchanged in v2
>
> drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 16 +---
> 1 file changed, 9 inserti
On Sun, Jan 29, 2017 at 01:24:43PM +, John Keeping wrote:
> In order to fully reset the state of the MIPI controller we must assert
> this reset.
>
> This is slightly more complicated than it could be in order to maintain
> compatibility with device trees that do not specify the reset property
The DSI0 and DSI1 blocks on the 2835 are related hardware blocks.
Some registers move around, and the featureset is slightly different,
as DSI1 (the 4-lane DSI) is a later version of the hardware block.
This driver doesn't yet enable DSI0, since we don't have any hardware
to test against, but it do
The DSI0 and DSI1 blocks on the 2835 are related hardware blocks.
Some registers move around, and the featureset is slightly different,
as DSI1 (the 4-lane DSI) is a later version of the hardware block.
This driver doesn't yet enable DSI0, since we don't have any hardware
to test against, but it do
On Tue, Jan 31, 2017 at 07:01:44PM +0100, Daniel Vetter wrote:
> For the experiement we have right now Eric (with vc4) and Sean Paul
> (with rockchip and zte) volunteering, and Gerd (entire pile of qemu
> drivers) and Boris (atmel) are also considering to participate. I
> think that's enough to get
On Wed, Dec 14, 2016 at 11:46:14AM -0800, Eric Anholt wrote:
> We want the HVS on, obviously, and we also want DSP3 (PV1's source) to
> be muxed from HVS channel 2 like we expect in vc4_crtc.c. The
> firmware wasn't setting the DSP3 mux up when both the LCD and HDMI
> were disabled.
>
> Signed-of
On Wed, Dec 14, 2016 at 11:46:15AM -0800, Eric Anholt wrote:
> We have to set a different pixel format, which tells the hardware to
> use the pix_width field that's fed in sideband from the DSI encoder to
> divide the "pixel" clock.
>
> Signed-off-by: Eric Anholt
> ---
> drivers/gpu/drm/vc4/vc4_
On Wed, Dec 14, 2016 at 11:46:17AM -0800, Eric Anholt wrote:
> The DSI0 and DSI1 blocks on the 2835 are related hardware blocks.
> Some registers move around, and the featureset is slightly different,
> as DSI1 (the 4-lane DSI) is a later version of the hardware block.
> This driver doesn't yet ena
Daniel Vetter writes:
> On Wed, Dec 14, 2016 at 11:46:15AM -0800, Eric Anholt wrote:
>> We have to set a different pixel format, which tells the hardware to
>> use the pix_width field that's fed in sideband from the DSI encoder to
>> divide the "pixel" clock.
>>
>> Signed-off-by: Eric Anholt
>>
On Tue, Jan 31, 2017 at 07:01:10PM +0100, Noralf Trønnes wrote:
>
> Den 31.01.2017 17.23, skrev Daniel Vetter:
> > On Tue, Jan 31, 2017 at 05:03:13PM +0100, Noralf Trønnes wrote:
> > > tinydrm provides helpers for very simple displays that can use
> > > CMA backed framebuffers and need flushing on
On Tue, Jan 31, 2017 at 05:41:09PM +, Liviu Dudau wrote:
> drm-mm.rst contains some unformatted dump of the vm_operations_struct
> structure. Add some C formatting around it and some context for the
> dump. While there, update the structure to resemble the new signature
> for the fault handler
Martin Peres writes:
> Despite all the careful planing of the kernel, a link may become
> insufficient to handle the currently-set mode. At this point, the
> kernel should mark this particular configuration as being broken
> and potentially prune the mode before setting the offending connector's
On Tue, Jan 31, 2017 at 02:31:32PM -0500, Sean Paul wrote:
> On Tue, Jan 31, 2017 at 07:01:44PM +0100, Daniel Vetter wrote:
> > For the experiement we have right now Eric (with vc4) and Sean Paul
> > (with rockchip and zte) volunteering, and Gerd (entire pile of qemu
> > drivers) and Boris (atmel)
On Tue, Jan 31, 2017 at 1:21 AM, Maarten Lankhorst
wrote:
>
> This is marked for rc6 because it seems the issue is triggerable on
> mainline and resulting in an oops.
So I did apply my obvious "avoid the oops and just warn about it"
patch: commit 39cb2c9a316e ("drm/i915: Check for NULL i915_vma i
https://bugs.freedesktop.org/show_bug.cgi?id=99136
--- Comment #9 from siyia ---
Created attachment 129261
--> https://bugs.freedesktop.org/attachment.cgi?id=129261&action=edit
it is here!!!
blood bug persists with latest mesa 17.1.0-git and llvm 5.0 on amd oland gpu
--
You are receiving thi
https://bugs.freedesktop.org/show_bug.cgi?id=99136
siyia changed:
What|Removed |Added
Resolution|FIXED |WONTFIX
--
You are receiving this mail because:
https://bugs.freedesktop.org/show_bug.cgi?id=99136
siyia changed:
What|Removed |Added
Status|RESOLVED|REOPENED
Resolution|WONTFIX
On Wed, Dec 14, 2016 at 11:46:19AM -0800, Eric Anholt wrote:
[...]
> diff --git a/drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c
> b/drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c
[...]
> +/**
> + * DOC: Raspberry Pi 7" touchscreen panel driver.
> + *
> + * The 7" touchscreen consist
On Tue, Jan 31, 2017 at 12:28:40PM -0800, Linus Torvalds wrote:
> On Tue, Jan 31, 2017 at 1:21 AM, Maarten Lankhorst
> wrote:
> >
> > This is marked for rc6 because it seems the issue is triggerable on
> > mainline and resulting in an oops.
>
> So I did apply my obvious "avoid the oops and just w
On Tue, Jan 31, 2017 at 10:07:19PM +0100, Thierry Reding wrote:
> On Wed, Dec 14, 2016 at 11:46:19AM -0800, Eric Anholt wrote:
> > +static int rpi_touchscreen_enable(struct drm_panel *panel)
> > +{
> > + struct rpi_touchscreen *ts = panel_to_ts(panel);
> > + int i;
> > +
> > + rpi_touchscreen
On Tue, Jan 31, 2017 at 10:49:51AM -0500, Sean Paul wrote:
> On Tue, Jan 31, 2017 at 04:02:26PM +0100, Thierry Reding wrote:
> > On Tue, Jan 31, 2017 at 09:38:53AM -0500, Sean Paul wrote:
> > > On Tue, Jan 31, 2017 at 09:54:49AM +0100, Thierry Reding wrote:
> > > > On Tue, Jan 31, 2017 at 09:01:07A
On Tue, Jan 31, 2017 at 10:07:19PM +0100, Thierry Reding wrote:
> On Wed, Dec 14, 2016 at 11:46:19AM -0800, Eric Anholt wrote:
> > +static int rpi_touchscreen_dsi_remove(struct mipi_dsi_device *dsi)
> > +{
> > + struct device *dev = &dsi->dev;
> > + struct rpi_touchscreen *ts = dev_get_drvdata(
On Tue, Jan 31, 2017 at 10:15:10AM -0800, Eric Anholt wrote:
> Thierry Reding writes:
>
> > [ Unknown signature status ]
> > On Tue, Jan 31, 2017 at 09:38:53AM -0500, Sean Paul wrote:
> >> On Tue, Jan 31, 2017 at 09:54:49AM +0100, Thierry Reding wrote:
> >> > On Tue, Jan 31, 2017 at 09:01:07AM +0
On 31 January 2017 at 21:17, Thierry Reding wrote:
> On Tue, Jan 31, 2017 at 10:49:51AM -0500, Sean Paul wrote:
>> On Tue, Jan 31, 2017 at 04:02:26PM +0100, Thierry Reding wrote:
>> > On Tue, Jan 31, 2017 at 09:38:53AM -0500, Sean Paul wrote:
>> > > On Tue, Jan 31, 2017 at 09:54:49AM +0100, Thierr
On Tue, Jan 31, 2017 at 10:19:52PM +0100, Daniel Vetter wrote:
> On Tue, Jan 31, 2017 at 10:07:19PM +0100, Thierry Reding wrote:
> > On Wed, Dec 14, 2016 at 11:46:19AM -0800, Eric Anholt wrote:
> > > +static int rpi_touchscreen_dsi_remove(struct mipi_dsi_device *dsi)
> > > +{
> > > + struct device
On Tue, Jan 31, 2017 at 10:17:02PM +0100, Daniel Vetter wrote:
> On Tue, Jan 31, 2017 at 10:07:19PM +0100, Thierry Reding wrote:
> > On Wed, Dec 14, 2016 at 11:46:19AM -0800, Eric Anholt wrote:
> > > +static int rpi_touchscreen_enable(struct drm_panel *panel)
> > > +{
> > > + struct rpi_touchscreen
On Tue, Jan 31, 2017 at 10:15:10AM -0800, Eric Anholt wrote:
[...]
> As is, I'm stuck out here with my panel driver I submitted on December
> 14th completely ignored, and no other developer will look at it because
> their review doesn't count and only yours does.
For the record, until earlier toda
On 29 January 2017 at 15:41, Shawn Guo wrote:
> Hi Dave,
>
> Please consider to pull the following ZTE DRM driver updates for 4.11.
> Thanks.
Sorry for delay, I've pulled this and fixed up the plane format mismatch,
please confirm it works with drm-next.
Dave.
__
Thierry Reding writes:
> [ Unknown signature status ]
> On Tue, Jan 31, 2017 at 10:15:10AM -0800, Eric Anholt wrote:
>> Thierry Reding writes:
>>
>> > [ Unknown signature status ]
>> > On Tue, Jan 31, 2017 at 09:38:53AM -0500, Sean Paul wrote:
>> >> On Tue, Jan 31, 2017 at 09:54:49AM +0100, Thi
2017년 02월 01일 06:31에 Thierry Reding 이(가) 쓴 글:
> On Tue, Jan 31, 2017 at 10:15:10AM -0800, Eric Anholt wrote:
>> Thierry Reding writes:
>>
>>> [ Unknown signature status ]
>>> On Tue, Jan 31, 2017 at 09:38:53AM -0500, Sean Paul wrote:
On Tue, Jan 31, 2017 at 09:54:49AM +0100, Thierry Reding
On 01/31/2017 03:55 PM, Breno Matheus Lima wrote:
> 2017-01-28 15:01 GMT-02:00 Marek Vasut :
>>
>> The mxsfb driver will crash if the mxsfb DT node has a subnode,
>> but the content of the subnode is not of-graph binding with an
>> endpoint linking to panel. The crash was triggered by providing
>>
drm_atomic_set_mode_for_crtc() modifies the .enable member of CRTC state
but documentation claims otherwise, fix that.
Signed-off-by: Dhinakaran Pandiyan
---
drivers/gpu/drm/drm_atomic.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/drm_atomic.c b/drive
On Tue, Jan 31, 2017 at 12:37 PM, Inki Dae wrote:
> 2017-01-31 19:01 GMT+09:00 Krzysztof Kozlowski :
>> On Tue, Jan 31, 2017 at 11:34 AM, Inki Dae wrote:
>>>
>>>
>>> 2017년 01월 31일 18:22에 Krzysztof Kozlowski 이(가) 쓴 글:
On Tue, Jan 31, 2017 at 2:01 AM, Inki Dae wrote:
>
>
> 2017년 0
On Tue, Jan 31, 2017 at 11:34 AM, Inki Dae wrote:
>
>
> 2017년 01월 31일 18:22에 Krzysztof Kozlowski 이(가) 쓴 글:
>> On Tue, Jan 31, 2017 at 2:01 AM, Inki Dae wrote:
>>>
>>>
>>> 2017년 01월 24일 10:50에 Hoegeun Kwon 이(가) 쓴 글:
Dear Thierry,
Could you please review this patch?
>>>
>>> Thierry,
On Tue, Jan 31, 2017 at 2:01 AM, Inki Dae wrote:
>
>
> 2017년 01월 24일 10:50에 Hoegeun Kwon 이(가) 쓴 글:
>> Dear Thierry,
>>
>> Could you please review this patch?
>
> Thierry, I think this patch has been reviewed enough but no comment from you.
> Seems you are busy. I will pick up this.
>
Comments fr
I added some printk()s all over and gathered a bit more information
about what's going on. It looks like the display doesn't work until the
drm connector code cleans up the *old* connector. For some reason, it
isn't motivated to do that until I go to the console and back.
In this case, the displ
2017-01-28 15:01 GMT-02:00 Marek Vasut :
>
> The mxsfb driver will crash if the mxsfb DT node has a subnode,
> but the content of the subnode is not of-graph binding with an
> endpoint linking to panel. The crash was triggered by providing
> old-style panel bindings to the mxsfb driver instead of t
https://bugs.freedesktop.org/show_bug.cgi?id=69897
Jan Vesely changed:
What|Removed |Added
Blocks||99553
Referenced Bugs:
https://bugs.freed
https://bugs.freedesktop.org/show_bug.cgi?id=99553
Jan Vesely changed:
What|Removed |Added
Depends on||69897
Referenced Bugs:
https://bugs.freed
https://bugs.freedesktop.org/show_bug.cgi?id=99553
Jan Vesely changed:
What|Removed |Added
Depends on||91556
Referenced Bugs:
https://bugs.freed
https://bugs.freedesktop.org/show_bug.cgi?id=52136
Jan Vesely changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
2017년 01월 20일 15:52에 Andrzej Hajda 이(가) 쓴 글:
> In some platforms there is attached another device to the end of HDMI.
> The patch adds support for it.
Andrzej, can you clarify what bridge device can be attached and actually is now
attached to the end of HDMI?
And I wonder if we have the device
On 01.02.2017 08:31, Inki Dae wrote:
>
> 2017년 01월 20일 15:52에 Andrzej Hajda 이(가) 쓴 글:
>> In some platforms there is attached another device to the end of HDMI.
>> The patch adds support for it.
> Andrzej, can you clarify what bridge device can be attached and actually is
> now attached to the end
2017년 02월 01일 16:34에 Andrzej Hajda 이(가) 쓴 글:
> On 01.02.2017 08:31, Inki Dae wrote:
>>
>> 2017년 01월 20일 15:52에 Andrzej Hajda 이(가) 쓴 글:
>>> In some platforms there is attached another device to the end of HDMI.
>>> The patch adds support for it.
>> Andrzej, can you clarify what bridge device can b
Hi Archit,
Sorry for spamming, forgot to add the list.
This quite big patchset adds support for 4K Ultra HD modes in SiI8620 MHL
bridge.
To support it full MHL3 protocol and its sub-protocols should be implemented.
Patchset contains also various fixes for bugs discovered during development.
v3
The Single-ended eCBUS Mode (eCBUS-S) mode provides 60 Mb/s full-duplex
bidirectional traffic for three channels:
- CBUS data (CBUS1 channel),
- High-bandwidth MHL data (eMSC channel),
- tunneling data (T-CBUS channel).
It is required to fully support MHL3 dongles.
Signed-off-by: Andrzej Hajda
MHL3 protocol requires device to respond to feature request from peer.
This minimal answer fulfills the requirement and allows to continue
negotiation.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/bridge/sil-sii8620.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/b
Stopping output causes full re-detection of the sink and slows down the process.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/bridge/sil-sii8620.c | 13 -
1 file changed, 13 deletions(-)
diff --git a/drivers/gpu/drm/bridge/sil-sii8620.c
b/drivers/gpu/drm/bridge/sil-sii8620.c
i
Messages queue can be cleaned up by message callbacks, to avoid repeated
removal of current message it should be removed from the queue before calling
these callbacks.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/bridge/sil-sii8620.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
di
Burst transmissions are required in MHL3 modes.
Signed-off-by: Andrzej Hajda
---
include/drm/bridge/mhl.h | 53
1 file changed, 53 insertions(+)
diff --git a/include/drm/bridge/mhl.h b/include/drm/bridge/mhl.h
index 3629b27..e8d194d 100644
--- a
Due to asynchronous nature of MHL flow of execution is dispersed.
Logical continuation of some actions happens after response of peer,
i.e in interrupt handler. To simplify coding continuation mechanism
has been added - it is now possible to provide continuation callback,
which will be called afte
MHL3 modes differs significantly from MHL1 mode, this helper will be used
frequently to clearly distinguish them.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/bridge/sil-sii8620.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/bridge/sil-sii8620
MHL3 protocol uses vendor specific infoframes to transmit additional
information to the sink. This patch adds definitions of structures and
constants used to create such frames.
Signed-off-by: Andrzej Hajda
---
include/drm/bridge/mhl.h | 32
1 file changed, 32 i
It is not necessary to set REG_COC_CTL0, REG_MHL_COC_CTL1 registers.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/bridge/sil-sii8620.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/bridge/sil-sii8620.c
b/drivers/gpu/drm/bridge/sil-sii8620.c
ind
Burst transmissions are used in MHL3 mode negotiation.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/bridge/sil-sii8620.c | 194 ++-
drivers/gpu/drm/bridge/sil-sii8620.h | 4 +
2 files changed, 197 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/b
Without delay CBUS sometimes was not reset properly.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/bridge/sil-sii8620.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/bridge/sil-sii8620.c
b/drivers/gpu/drm/bridge/sil-sii8620.c
index e84cda0..6ef
The patch adds code to report back feature complete IRQ, and code
to read and drop burst writes from peer.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/bridge/sil-sii8620.c | 21 -
1 file changed, 20 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/sil-s
Peer capabilities should be read differently depending on protocol version.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/bridge/sil-sii8620.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/sil-sii8620.c
b/drivers/gpu/drm/bridge/sil-s
In case of MHL3 CBUS is bring-up already in sii8620_got_ecbus_speed.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/bridge/sil-sii8620.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/gpu/drm/bridge/sil-sii8620.c
b/drivers/gpu/drm/bridge/sil-sii8620.c
index be953f3..fb69353 1
Device should report to the peer which features are really supported.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/bridge/sil-sii8620.c | 27 +++
drivers/gpu/drm/bridge/sil-sii8620.h | 16
2 files changed, 31 insertions(+), 12 deletions(-)
diff --gi
MHL2 receiver require disabling transmitter on initialization.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/bridge/sil-sii8620.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/bridge/sil-sii8620.c
b/drivers/gpu/drm/bridge/sil-sii8620.c
index a50ade6..
This functionality is necessary to implement MHL3 modes.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/bridge/sil-sii8620.c | 35 +++
1 file changed, 35 insertions(+)
diff --git a/drivers/gpu/drm/bridge/sil-sii8620.c
b/drivers/gpu/drm/bridge/sil-sii8620.c
in
MHL3 requires that after reading EDID from the sink source should ask
peer for features. To make both protocols happy the patch splits the code
accordingly.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/bridge/sil-sii8620.c | 31 +++
1 file changed, 27 insertions(
MHL1 and MHL3 have different initialization paths. To make both protocols
happy sink detection is put into continuation after link mode enablement.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/bridge/sil-sii8620.c | 34 +++---
1 file changed, 19 insertions(+), 15
MHL3 protocol requires registry adjustments depending on chosen video mode.
Necessary information is gathered in mode_fixup callback. In case of HDMI
video modes driver should also send special AVI and MHL3 infoframes.
The patch introduces generic helpers for handling MHL3 infoframes, in
case of a
In case of MHL3 HSIC should be initialized.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/bridge/sil-sii8620.c | 38
drivers/gpu/drm/bridge/sil-sii8620.h | 10 ++
2 files changed, 44 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/brid
Write burst should be enabled for MHL_INT_RC_FEAT_REQ and disabled for
other commands. The patch moves functions up and adds delay setting
for MHL3 burst mode.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/bridge/sil-sii8620.c | 88
1 file changed, 50 ins
Since all sub-protocols of MHL3 are already supported MHL3 mode can be enabled.
With this patch it is possible to use packed pixel modes and clocks up
to 300MHz - 1920x1080@60Hz and 4K modes.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/bridge/sil-sii8620.c | 23 ---
1 f
The patch allows to avoid rare cases when discovery fails.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/bridge/sil-sii8620.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/sil-sii8620.c
b/drivers/gpu/drm/bridge/sil-sii8620.c
index d0e6dc3..1c7
Bug in DECON(CRTC) driver prevented interlace modes from proper work.
Since DECON is fixed interlace modes can be enabled in MHL.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/bridge/sil-sii8620.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/bridge/sil-sii8620.c
b/d
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