The bias, bandgap and PLL should all be configured before we enable
them.
Signed-off-by: John Keeping
---
v3:
- Squash together two patches that both affect initialization order of
the PHY
Unchanged in v2
drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 11 ++-
1 file changed, 6 insertions(+)
This is not needed since we can access the mode via the CRTC from the
enable hook. Also remove the "mode" field that is no longer used.
Signed-off-by: John Keeping
Reviewed-by: Chris Zhong
---
v3:
- Add Chris' Reviewed-by
New in v2
drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 13 +
1
When connected to the MIPI DSI output, we need to use N{H,V}SYNC for the
internal connection but these flags are meaningless for DSI panels.
Switch the test so that we do not set the P{H,V}SYNC bits unless the
mode requires it.
Signed-off-by: John Keeping
Reviewed-by: Mark Yao
---
v3:
- Add Mark
With atomic modesetting the hardware will be powered off when the
mode_set function is called. We should configure the hardware in the
enable function, which is the atomic version of "commit" so let's use
the enable hook rather than commit while we're at it.
Signed-off-by: John Keeping
---
v3:
-
Also don't power up the DSI host at this point since this is not
necessary in order to configure the PHY and we do so later when
selecting video or command mode.
Signed-off-by: John Keeping
Reviewed-by: Chris Zhong
---
v3:
- Add Chris' Reviewed-by
Unchanged in v2
drivers/gpu/drm/rockchip/dw-mi
This clock rate is derived from the PHY PLL, so it should be calculated
dynamically. Use the same calculation as the vendor kernel to derive
the escape clock speed.
Signed-off-by: John Keeping
Reviewed-by: Chris Zhong
---
v3:
- Improve the commit message a bit
- Add Chris' Reviewed-by
Unchanged
We want to check that both the GEN_CMD_EMPTY and GEN_PLD_W_EMPTY bits
are set so we can't just check "val & mask" because that will be true if
either bit is set.
Signed-off-by: John Keeping
Reviewed-by: Chris Zhong
---
v3:
- Add Chris' Reviewed-by
Unchanged in v2
drivers/gpu/drm/rockchip/dw-mi
These values are specified as constant time periods but the PHY
configuration is in terms of the current lane byte clock so using
constant values guarantees that the timings will be outside the
specification with some display configurations.
Derive the necessary configuration from the byte clock i
The multiplication ratio for the PLL is required to be even due to the
use of a "by 2 pre-scaler". Currently we are likely to end up with an
odd multiplier even though there is an equivalent set of parameters with
an even multiplier.
For example, using the 324MHz bit rate with a reference clock o
As an aid to debugging.
Signed-off-by: John Keeping
Reviewed-by: Chris Zhong
---
v3:
- Add Chris' Reviewed-by
Unchanged in v2
drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
b/drivers/gpu/drm/r
Requesting the HS clock from the PHY before we initialize it causes an
invalid signal to be sent out since the input clock is not yet
configured. The PHY databook suggests only asserting this signal when
performing HS transfers, so let's do that.
Signed-off-by: John Keeping
Reviewed-by: Chris Zh
This re-roll mostly just gather up reviewed-by tags, although I have
also wrapped some long lines and squashed together some commits as
suggested by Chris Zhong.
Version 2 was posted here:
https://www.spinics.net/lists/arm-kernel/msg556683.html
John Keeping (24):
drm/rockchip: dw-mipi-dsi: don'
I haven't found any method for getting the length of a response, so this
just uses the requested rx_len
Signed-off-by: John Keeping
---
v3:
- Fix checkpatch warnings
Unchanged in v2
drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 56 ++
1 file changed, 56 insertions(+)
Some panels need to be configured with commands sent over the MIPI link,
which they will do in the prepare hook. Call this after the PHY has
been initialized so that we are able to send commands to the panel.
Signed-off-by: John Keeping
Reviewed-by: Chris Zhong
---
v3:
- Add Chris' Reviewed-by
By dereferencing the MIPI command buffer as a u32* we rely on it being
correctly aligned on ARM, but this may not be the case. Copy it into a
stack variable that will be correctly aligned.
Signed-off-by: John Keeping
Reviewed-by: Chris Zhong
---
v3:
- Add Chris' Reviewed-by
Unchanged in v2
dr
Instead of always sending commands in LP mode, respect the
MIPI_DSI_MSG_USE_LPM flag to decide how to send each message. Also
request acks if MIPI_DSI_MSG_REQ_ACK is set.
Signed-off-by: John Keeping
Reviewed-by: Chris Zhong
---
v3:
- Add Chris' Reviewed-by
Unchanged in v2
drivers/gpu/drm/rock
Panel drivers may want to sent commands during the disable function, for
example MIPI_DCS_SET_DISPLAY_OFF before the video signal ends. In order
to send commands we need to write to registers, so pclk must be enabled.
While changing this, remove the unnecessary code after the panel
unprepare call
This ensures that the output resolution is known before fbcon loads.
Signed-off-by: John Keeping
---
Unchanged in v3
Unchanged in v2
drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
b/d
As a side-effect of this, encode the endianness explicitly rather than
casting a u16.
Signed-off-by: John Keeping
Reviewed-by: Chris Zhong
---
v3:
- Add Chris' Reviewed-by
Unchanged in v2
drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
dif
Signed-off-by: John Keeping
Reviewed-by: Chris Zhong
---
v3:
- Add Chris' Reviewed-by
Unchanged in v2
drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 16 +---
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
b/drivers/gpu/drm/rockchip/dw
In order to fully reset the state of the MIPI controller we must assert
this reset.
This is slightly more complicated than it could be in order to maintain
compatibility with device trees that do not specify the reset property.
Signed-off-by: John Keeping
Reviewed-by: Chris Zhong
---
v3:
- Add
This shows that we only use the mode from the enable function and
prepares us to remove the "mode" field and the mode_set hook in the next
commit.
Signed-off-by: John Keeping
Reviewed-by: Chris Zhong
---
v3:
- Add Chris' Reviewed-by
New in v2
drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 41 +++
In a couple of places here we use "val" for the value that is about to
be written to a register but then reuse the same variable for the value
of a status register before we get around to writing it. Rename the
value to be written to so that we write the value we intend to and not
what we have jus
As the documentation for readx_poll_timeout says, we want to use the
specialized macro for readl rather than using the generic version
directly.
Signed-off-by: John Keeping
Reviewed-by: Chris Zhong
---
v3:
- Add Chris' Reviewed-by
Unchanged in v2
drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 10 +++
This matches other drivers.
Signed-off-by: John Keeping
---
Unchanged in v3
Unchanged in v2
drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
index be395
https://bugs.freedesktop.org/show_bug.cgi?id=93548
--- Comment #8 from Marcus ---
I was affected by this bug for a long time but it seems to be fixed now in the
latest mesa git.
I am running ubuntu 16.10 on a i7 920 with a AMD Radeon RX480 with mesa stack
upgraded with padoka PPA
marc@morph:~$
The video processing pipeline on the second output on the GE B850v3:
Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output
Each bridge has a dedicated flash containing firmware for supporting the
custom design. The result is that in this design neither the STDP4028
nor the ST
From: Oleksandr Andrushchenko
From the description of the "DMA-BUF/GEM Object references
and lifetime overview" it is not clear when exactly
dma_buf gets destroyed and memory freed: only driver
.release function mentioned which makes confusion on the
real buffer's lifetime.
Add more description
So with the userspace question resolved, only this question of memory
allocation remains. I see the following options:
- Keep the current __get_free_pages-based allocation. This means that
firmware loading may fail when memory is fragmented. The function can be
augmented by adding vmalloc supp
On 01/27/2017 05:04 PM, Breno Matheus Lima wrote:
> Hi,
Hi,
> I'm trying to use kernel 4.10.0-rc5 and DRM_MXS driver on a i.MX6SX SabreSD
> Rev A, but it crashes during the boot, I'm also disabling the FB_MXS driver
> to avoid any conflict. By using the driver FB_MXS the board boots normally
> an
Add MAINTAINERS entry for the second video output of the GE B850v3:
STDP4028-ge-b850v3-fw bridges (LVDS-DP)
STDP2690-ge-b850v3-fw bridges (DP-DP++)
Cc: Laurent Pinchart
Cc: Martyn Welch
Cc: Martin Donnelly
Cc: Daniel Vetter
Cc: Enric Balletbo i Serra
Cc: Philipp Zabel
Cc: Rob H
On 01/27/2017 09:40 PM, Marek Vasut wrote:
> On 01/27/2017 05:04 PM, Breno Matheus Lima wrote:
>> Hi,
>
> Hi,
>
>> I'm trying to use kernel 4.10.0-rc5 and DRM_MXS driver on a i.MX6SX SabreSD
>> Rev A, but it crashes during the boot, I'm also disabling the FB_MXS driver
>> to avoid any conflict. B
Hi,
I'm trying to use kernel 4.10.0-rc5 and DRM_MXS driver on a i.MX6SX SabreSD
Rev A, but it crashes during the boot, I'm also disabling the FB_MXS driver
to avoid any conflict. By using the driver FB_MXS the board boots normally
and the display is working as well.
I would like to know if is pos
On 01/27/2017 04:00 PM, Daniel Vetter wrote:
On Fri, Jan 27, 2017 at 09:04:25AM +0200, Oleksandr Andrushchenko wrote:
From: Oleksandr Andrushchenko
From the description of the "DMA-BUF/GEM Object references
and lifetime overview" it is not clear when exactly
dma_buf gets destroyed and memory
The video processing pipeline on the second output on the GE B850v3:
Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output
Each bridge has a dedicated flash containing firmware for supporting the
custom design. The result is that in this design neither the STDP4028
nor the ST
On 01/28/2017 01:46 PM, Breno Matheus Lima wrote:
> 2017-01-27 18:43 GMT-02:00 Marek Vasut :
>>
>> On 01/27/2017 09:40 PM, Marek Vasut wrote:
>>> On 01/27/2017 05:04 PM, Breno Matheus Lima wrote:
Hi,
>>>
>>> Hi,
>>>
I'm trying to use kernel 4.10.0-rc5 and DRM_MXS driver on a i.MX6SX
> Sab
2017-01-27 18:43 GMT-02:00 Marek Vasut :
>
> On 01/27/2017 09:40 PM, Marek Vasut wrote:
> > On 01/27/2017 05:04 PM, Breno Matheus Lima wrote:
> >> Hi,
> >
> > Hi,
> >
> >> I'm trying to use kernel 4.10.0-rc5 and DRM_MXS driver on a i.MX6SX
SabreSD
> >> Rev A, but it crashes during the boot, I'm als
of_match_device could return NULL, and so can cause a NULL
pointer dereference later.
Signed-off-by: Shailendra Verma
---
drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
b/drivers/
Configures the megachips-stdp-ge-b850v3-fw bridges on the GE
B850v3 dts file.
Cc: Laurent Pinchart
Cc: Martyn Welch
Cc: Martin Donnelly
Cc: Javier Martinez Canillas
Cc: Enric Balletbo i Serra
Cc: Philipp Zabel
Cc: Rob Herring
Cc: Fabio Estevam
Signed-off-by: Peter Senna Tschudin
---
libdrm for IGT - Build # 67 - Failure:
Check console output at https://jenkins.freedesktop.org/job/libdrm-for-igt/67/
to view the results.
build.log
Description: Binary data
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freed
Devicetree binding documentation for the second video output
of the GE B850v3:
STDP4028-ge-b850v3-fw bridges (LVDS-DP)
STDP2690-ge-b850v3-fw bridges (DP-DP++)
Added entry for MegaChips at:
Documentation/devicetree/bindings/vendor-prefixes.txt
Cc: Laurent Pinchart
Cc: Martyn Welch
Cc: Mar
When enabling panel backlight, if the current backlight level
setting matches the panel's minimal, it would apply default policy to
override the current level by the panel's maximum until next request
to update brightness, this leads unexpected user confusion with
temporary full power backlight.
T
On Thu, Jan 05, 2017 at 01:18:47PM +0530, Archit Taneja wrote:
Hi Archit,
Thank you for the comments!
[...]
> > + total_size = (block[EDID_EXT_BLOCK_CNT] + 1) * EDID_LENGTH;
> > + if (total_size > EDID_LENGTH) {
> > + kfree(block);
> > + block = kmalloc(total_size, GFP_KER
The mxsfb driver will crash if the mxsfb DT node has a subnode,
but the content of the subnode is not of-graph binding with an
endpoint linking to panel. The crash was triggered by providing
old-style panel bindings to the mxsfb driver instead of the new
of-graph ones.
The problem happens in mxsfb
https://bugs.freedesktop.org/show_bug.cgi?id=99275
--- Comment #11 from Reimar Imhof ---
tried a bisect:
git bisect start
# good: [c8d2bc9bc39ebea8437fd974fdbc21847bb897a3] Linux 4.8
git bisect good c8d2bc9bc39ebea8437fd974fdbc21847bb897a3
# bad: [69973b830859bc6529a7a0468ba0d80ee5117826] Linux 4
https://bugs.freedesktop.org/show_bug.cgi?id=99275
--- Comment #12 from Reimar Imhof ---
tried an other bisect
git bisect start
# bad: [9929780e86854833e649b39b290b5fe921eb1701] Merge tag
'driver-core-4.9-rc1' of
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core
git bisect bad 992
https://bugs.freedesktop.org/show_bug.cgi?id=99275
--- Comment #13 from Reimar Imhof ---
after I've had seen, 4.8 hat the same problem I tried to find the first good
4.8.x:
> git bisect new
107d026ae1c80ac0881f791a58cd115321d111ca is the first new commit
commit 107d026ae1c80ac0881f791a58cd11532
https://bugs.freedesktop.org/show_bug.cgi?id=99275
--- Comment #14 from Reimar Imhof ---
I've also tried 4.9.6 and 4.10-rc5.
Again error still existing.
--
You are receiving this mail because:
You are the assignee for the bug.___
dri-devel mailing li
This series is,
Reviewed-by: Edward O'Callaghan
On 01/29/2017 06:49 AM, Grazvydas Ignotas wrote:
> I've taken several patches from amdgpu-pro libdrm that look useful
> to me and I think can be applied already. The only things I did was
> rebasing, fixing some typos and dropping Change-Id.
>
> Al
Hi all,
Today's linux-next merge of the tip tree got a conflict in:
drivers/gpu/drm/ttm/ttm_bo.c
between commit:
7c6d639d465e ("drm/ttm: Make sure BOs being swapped out are cacheable")
from the drm-misc-fixes tree and commit:
bdfafc4ffdd2 ("locking/atomic, kref: Kill kref_sub()")
from
On Mon, Jan 30, 2017 at 10:23:45AM +0530, Shailendra Verma wrote:
> of_match_device could return NULL, and so can cause a NULL
> pointer dereference later.
>
> Signed-off-by: Shailendra Verma
> ---
> drivers/gpu/drm/tegra/sor.c |4
> 1 file changed, 4 insertions(+)
No, this will never
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