Now that this is not used anywhere else anymore we can go ahead
and remove the legacy version.
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/drm_irq.c | 35 +++
include/drm/drm_irq.h | 1 -
2 files changed, 11 insertions(+), 25 deletions(-)
diff --git a/dr
For now DC is only helping on screen off scenarios since PSR is disabled.
But if we want to enable PSR first we need to make DC reliable with screen on.
Biggest challenge is to deal with vblank counters since frame counter register
is read only and can be reset in DC state.
This series is one of
This will allow drivers to control specific power saving
feature and power domains when dealing with vblanks.
Vblanks code are protected by spin_locks where we can't
have anything that can sleep. While power saving features
and power domain code have mutexes to control the states.
Mutex can sleep
drm_crtc_vblank_get call the drm_vblank_prepare that will be used soon
to control power saving states or anything else that needs a mutex
before the vblank happens.
local_irq_disable disables kernel preemption so we won't be able
to use mutex inside drm_crtc_vblank_get. For this reason we need
to
No functional change. This is just a reorg that aims to allow
a cleaner introduction of new vblank hooks for gen9+.
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/i915_irq.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/d
Vblank counters are not restored by DMC when exiting deep DC states
because frame counter register is read-only. So it is better to avoid
Deep DC states when waiting for Vblanks. At least we don't mess with
the counters when already waiting for vblank.
Signed-off-by: Rodrigo Vivi
---
drivers/gpu
In modern systems there are situations that you can let the screen
enabled and sleep or shut off a most of the display controler.
In situations like this the vblank hw counter can be reset.
When this happens everything in the system gets crazy by
the big count.
So, the right approach is to make s
DC state reset the frame counter that is a read-only register.
So, besides blocking DC state on vblank let's restore the
drm crtc vblank counter to a place we know it is reliable.
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/i915_irq.c | 2 ++
1 file changed, 2 insertions(+)
diff --git
On Wed, 2016-08-03 at 18:00 +0300, Ville Syrjälä wrote:
> On Tue, Aug 02, 2016 at 06:37:37PM -0400, Lyude wrote:
> >
> > Now that we can hook into update_crtcs and control the order in which we
> > update CRTCs at each modeset, we can finish the final step of fixing
> > Skylake's watermark handl
On Wed, Aug 03, 2016 at 06:00:42PM +0300, Ville Syrjälä wrote:
> On Tue, Aug 02, 2016 at 06:37:37PM -0400, Lyude wrote:
> > Now that we can hook into update_crtcs and control the order in which we
> > update CRTCs at each modeset, we can finish the final step of fixing
> > Skylake's watermark han
ent hardware capabilities.
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IUM_DDEBUG.
Kernel: 4.7.0-gentoo
Mesa: git-6fb6201
LLVM: r277571
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Hi,
On 03-08-2016 12:48, Daniel Vetter wrote:
> On Wed, Aug 03, 2016 at 04:26:24PM +0530, Shashank Sharma wrote:
>> This patch series adds 4 patches.
>> - The first two patches add aspect ratio support in DRM layes
>> - Next two patches add new aspect ratios defined in CEA-861-F
>> supported fo
On 08/02/2016 04:28 PM, Russell King wrote:
> On Tue, Aug 02, 2016 at 04:09:58PM -0700, Joshua Clayton wrote:
>> Greetings Russell,
>> I'm publishing an etnaviv yocto layer on github.
>> One of the components is libdrm-armada, which we get from
>> git://ftp.arm.linux.org.uk/~rmk/libdrm-armada.git
Hi Archit, Mark
Cc Thierry, Russell
These are resend of v2 of DesignWare HDMI I2S support patches.
(I added drm-bridge maintainer Archit on To:)
It will use ALSA SoC hdmi-codec driver, but we can't use it as-is
at this point.
1) patch tidyup hdmi-codec driver to enable dw-hdmi I2S support.
2) pat
On 08/02/2016 06:38 PM, Fabio Estevam wrote:
> Hi Joshua,
>
> On Tue, Aug 2, 2016 at 8:09 PM, Joshua Clayton
> wrote:
>> Greetings Russell,
>> I'm publishing an etnaviv yocto layer on github.
> Cool! Could you please let us know when this layer becomes available?
>
> Thanks
Sure, Fabio.
It is a
On 08/01/2016 02:29 AM, Philipp Zabel wrote:
> Am Donnerstag, den 28.07.2016, 16:09 -0700 schrieb Steve Longerbeam:
>>> Now split the frame in half and suddenly pixel x' = 640 is the start of
>>> a new tile, so it is sampled at x = 160, and pixel x' = 1279 will be
>>> sampled at x = 160 + (1279 - 6
Hi Daniel
> > > > Mark, Thierry, Daniel
> > > > I wonder who can be maintainer for this patch ??
> > >
> > > It's a DRM patch so I'd expect someone in the DRM subsystem.
> >
> > OK, I see.
> > But, I will keep Cc to you for this patch-set.
>
> Archit Tajena is the maintainer of last resort for
From: Kuninori Morimoto
hdmi-codec driver is common HDMI sound driver,
but it doesn't care about multi sound ports.
For example, hdmi-codec driver is supporting 1 I2S and 1 SPDIF ports,
so, we can't use this driver if HDMI has 2 or more I2S ports.
And we would like to use multi detection.
For e
From: Kuninori Morimoto
Current dw-hdmi is supporting sound via AHB bus, but it has
I2S audio feature too. This patch adds I2S audio support to dw-hdmi.
This HDMI I2S is supported by using ALSA SoC common HDMI encoder
driver.
Tested-by: Jose Abreu
Signed-off-by: Kuninori Morimoto
---
v1 -> v2
Hi Chanwoo Choi,
On 2016å¹´08æ02æ¥ 12:21, Chanwoo Choi wrote:
> Hi Lin,
>
> On the next version, I'd like you to add the 'linux-pm at vger.kernel.org'
> because devfreq is a subsystem of power management.
Sure, will do it next version.
> On 2016ë
08ì 02ì¼ 10:03, hl wrote:
>> Hi Chanwoo Cho
On 03.08.2016 11:09, Dan Carpenter wrote:
> Hello Nicolai Hähnle,
>
> The patch 324c614a819a: "drm/amdgpu/gfx7: set
> USER_SHADER_ARRAY_CONFIG based on disable_cu parameter" from Jun 17,
> 2016, leads to the following static checker warning:
>
> drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:5057 gfx
Since a DRM function that reads link DP link status is available, let's
use that instead of the i915 clone.
Signed-off-by: Dhinakaran Pandiyan
---
drivers/gpu/drm/i915/intel_dp.c | 15 +++
drivers/gpu/drm/i915/intel_dp_link_training.c | 11 ---
drivers/gpu/drm/i
Currently we do not print the training pattern used in any of the DP link
training stages. Including this piece of information in debug messages will
help debugging.
Signed-off-by: Dhinakaran Pandiyan
---
drivers/gpu/drm/i915/intel_dp.c | 13 +++--
1 file changed, 7 insertions(+), 6 dele
We do not currently output enough information to help debugging DP link
training issues. For e.g., training pattern and link status information.
This series aims to correct that by adding debug messages that can help
developers.
Dhinakaran Pandiyan (4):
drm/i915/dp: Add debug messages to print D
A full dump of link status can be handy in debugging link training
failures. Let's add that to the debug messages when link training fails.
Signed-off-by: Dhinakaran Pandiyan
---
drivers/gpu/drm/i915/intel_dp_link_training.c | 11 +++
drivers/gpu/drm/i915/intel_drv.h | 6 ++
The causes of clock recovery and channel equalization failures are not
explicitly printed in debug messages. Help debugging link training
failures by printing why it failed.
Doing this in the driver would mean re-implementing some of the drm static
functions that decode link status. Let's avoid th
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