Hi Jitao,
This patch looks really good now.
Just saw small nits below.
Other than these small items, for the series:
Reviewed-by: Daniel Kurtz
On Thu, Mar 17, 2016 at 9:15 AM, Jitao Shi wrote:
> This patch adds drm_bridge driver for parade DSI to eDP bridge chip.
>
> Signed-off-by: Jitao Shi
2015ë
10ì 28ì¼ 17:19ì Yakir Yang ì´(ê°) ì´ ê¸:
> In order to move exynos dp code to bridge directory,
> we need to convert driver drm bridge mode first. As
> dp driver already have a ptn3460 bridge, so we need
> to move ptn bridge to the next bridge of dp bridge.
>
> Tested-by: Javier
+ Ajay kumar with Samsung email
Hi,
2016ë
03ì 23ì¼ 07:12ì Heiko Stübner ì´(ê°) ì´ ê¸:
> Hi,
>
> Am Dienstag, 22. März 2016, 16:19:37 schrieb Javier Martinez Canillas:
>> On 03/18/2016 07:53 PM, Doug Anderson wrote:
>>> On Thu, Mar 17, 2016 at 11:41 PM, Caesar Wang >> gmail.com>
> w
2016ë
03ì 23ì¼ 07:52ì Heiko Stübner ì´(ê°) ì´ ê¸:
> Am Mittwoch, 23. März 2016, 07:44:59 schrieb Inki Dae:
>> + Ajay kumar with Samsung email
>>
>> Hi,
>>
>> 2016ë
03ì 23ì¼ 07:12ì Heiko Stübner ì´(ê°) ì´ ê¸:
>>> Hi,
>>>
>>> Am Dienstag, 22. März 2016, 16:19:37 schrieb Ja
2016ë
03ì 23ì¼ 08:39ì Russell King - ARM Linux ì´(ê°) ì´ ê¸:
> On Wed, Mar 23, 2016 at 08:09:33AM +0900, Inki Dae wrote:
>> In this case, someone else may send an email again like you "who is going to
>> merge?"
>> That would be why we need a maintainer.
>>
>> drm panel is already man
On Wed, Mar 23, 2016 at 08:54:15AM +0900, Inki Dae wrote:
>
Please wrap your long lines.
>
> 2016ë
03ì 23ì¼ 08:39ì Russell King - ARM Linux ì´(ê°) ì´ ê¸:
> > On Wed, Mar 23, 2016 at 08:09:33AM +0900, Inki Dae wrote:
> >> In this case, someone else may send an email again like you "wh
On Tue, 22 Mar 2016 16:40:18 -0700
Joe Perches wrote:
> On Tue, 2016-03-22 at 22:49 +, Colin King wrote:
> > From: Colin Ian King
> >
> > There is a missing comma between two strings in the dsi_errors[]
> > array initializer, causing two strings to be concatenated and the
> > array being in
||
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On 18.03.2016 15:03, Michel Dänzer wrote:
> On 16.03.2016 21:56, Christian König wrote:
>> Can somebody with commit access push those two patches after the review?
>> I don't have write permission for libdrm.
>
> Well, that should clearly get fixed. Daniel, can you add him, or who
> should we as
limit the AGP detect condition to VIA chips using DMA engine name before
Chrome9 to avoid drm error message "[drm:via_driver_load [via]] *ERROR* Failed
acquiring AGP device.". Verify this on old H1/H2 chip and VX800/VX900 chips.
---
drivers/gpu/drm/via/via_drv.c |2 +-
1 file changed, 1 inse
tps://lists.freedesktop.org/archives/dri-devel/attachments/20160323/c3832a28/attachment.html>
>
>> So although it's small framework or just subdirectory, we would need
>> someone who can manage the framework to avoid further confusion if
>> necessary.
>
> So maybe it just doesn't need a maintainer, and maybe those the owner
> of the bridge driver should be responsible for choosing the tree
On 2016å¹´02æ15æ¥ 19:10, Yakir Yang wrote:
> Rockchip have three clocks for dp controller, we leave pclk_edp
> to analogix_dp driver control, and keep the sclk_edp_24m and
> sclk_edp in platform driver.
>
> Signed-off-by: Yakir Yang
> Tested-by: Javier Martinez Canillas
It looks good for me, I
On 2016å¹´03æ23æ¥ 08:41, Dave Airlie wrote:
>>> So although it's small framework or just subdirectory, we would need
>>> someone who can manage the framework to avoid further confusion if
>>> necessary.
>> So maybe it just doesn't need a maintainer, and maybe those the owner
>> of the bridge dri
Hello Marek, Ville,
How can we progress in this ? and how can I help you to get this
generic zpos property merge into drm ?
Regards,
Benjamin
2016-02-29 16:12 GMT+01:00 Ville Syrjälä :
> On Wed, Jan 27, 2016 at 03:44:39PM +0100, Marek Szyprowski wrote:
>> This patch adds support for generic pl
On Wed, 23 Mar 2016 11:42:54 +0300
Alexey Brodkin wrote:
> Current name is a bit misleading because what that helper function
> really does it calls drm_connector_unregister() for all connectors.
>
> This all has nothing to do with hotplugging so let's name things
> properly.
>
> And while at i
As a pair to already existing drm_connector_unplug_all()
(which we'll rename in this series to drm_connector_unregister_all())
we're adding generic implementation of what is already done in some drivers
for registering all connectors.
After implementation of that new helper we're updating 2 driver
As a pair to already existing drm_connector_unregister_all() we're adding
generic implementation of what is already done in some drivers.
Once this helper is implemented we'll be ready to switch existing
driver-specific implementations with the generic one.
Signed-off-by: Alexey Brodkin
Cc: Dani
This driver used to have its own implementation of connector_register_all()
which actually was taken as a prototype of drm_connector_register_all().
Now when drm_connector_register_all() exists reusing it here.
And while at it replace atmel_hlcdc_dc_connector_unplug_all()
with generic drm_connect
Current name is a bit misleading because what that helper function
really does it calls drm_connector_unregister() for all connectors.
This all has nothing to do with hotplugging so let's name things
properly.
And while at it remove potentially dangerous locking around
drm_connector_unregister()
On Tue, Mar 22, 2016 at 11:55:45PM +0900, Minchan Kim wrote:
> On Tue, Mar 22, 2016 at 02:50:37PM +0900, Joonsoo Kim wrote:
> > On Mon, Mar 21, 2016 at 03:31:02PM +0900, Minchan Kim wrote:
> > > We have allowed migration for only LRU pages until now and it was
> > > enough to make high-order pages.
Now that a generic drm_connector_register_all() helper exists we may safely
substitute it for the driver-specific implementation of connectors plugging
in sysfs.
Signed-off-by: Alexey Brodkin
Cc: Daniel Vetter
Cc: David Airlie
Cc: linux-renesas-soc at vger.kernel.org
Acked-by: Laurent Pinchart
https://bugzilla.kernel.org/show_bug.cgi?id=115141
Eugene Shalygin changed:
What|Removed |Added
CC||eugene.shalygin at gmail.com
--- Comme
https://bugzilla.kernel.org/show_bug.cgi?id=115141
--- Comment #2 from Eugene Shalygin ---
Created attachment 210331
--> https://bugzilla.kernel.org/attachment.cgi?id=210331&action=edit
Kernel config
Config which worked with 4.4, processed by 'make oldconfig'.
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Eugene Shalygin changed:
What|Removed |Added
Attachment #210331|application/octet-stream|application/x-config
mime typ
color.
mesa-git built date: 2016-Mar-22 07:16:38 CET
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On Wed, Mar 23, 2016 at 11:42:53AM +0300, Alexey Brodkin wrote:
> As a pair to already existing drm_connector_unplug_all()
> (which we'll rename in this series to drm_connector_unregister_all())
> we're adding generic implementation of what is already done in some drivers
> for registering all conn
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(AMD64)
OS|All |Linux (All)
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Hi
On Wed, Mar 23, 2016 at 9:42 AM, Alexey Brodkin
wrote:
> As a pair to already existing drm_connector_unregister_all() we're adding
> generic implementation of what is already done in some drivers.
>
> Once this helper is implemented we'll be ready to switch existing
> driver-specific implement
tps://lists.freedesktop.org/archives/dri-devel/attachments/20160323/8747aba3/attachment-0001.html>
Hey
On Mon, Mar 21, 2016 at 6:14 PM, Daniel Vetter wrote:
> On Mon, Mar 21, 2016 at 01:26:58PM +0100, David Herrmann wrote:
>> Hi
>>
>> On Mon, Mar 21, 2016 at 8:51 AM, Daniel Vetter
>> wrote:
>> > Just a bit of wording polish plus mentioning that it can fail and must
>> > be restarted.
>> >
>>
On Wed, Mar 23, 2016 at 12:30:42PM +0100, David Herrmann wrote:
> My question was rather about why we do this? Semantics for EINTR are
> well defined, and with SA_RESTART (default on linux) user-space can
> ignore it. However, looping on EAGAIN is very uncommon, and it is not
> at all clear why it
On Thu, 17 Mar 2016, Sebastian Reichel wrote:
> On Thu, Mar 17, 2016 at 02:14:26PM +0200, Laurent Pinchart wrote:
>> [...]
>> > +
>> > + /* panel is 480x464 with top and bottom 5 lines not visible */
>>
>> I assume you mean 480x864 ?
>
> Yes, nice catch. Basically the screen is 480x864,
Hi Inki,
This set of patches provides set of different fixes and enhancements
for DECON -> HDMI path. It is based on:
- my HDMI patches which are not yet merged[1], could you look at them
by the way, they were posted about 5 months ago :)
- IOMMU patches by Marek (for some mysterious reason HDMI
HDMI registry dump unnecessary spoils console and is not very helpful.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/exynos/exynos_hdmi.c | 263 ---
1 file changed, 263 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c
b/drivers/gpu/drm/exynos/ex
To ensure HDMI-PHY reprogramming will not affect
HDMI the latter should be reset.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/exynos/exynos_hdmi.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c
b/drivers/gpu/drm/exynos/exynos_hdmi.c
index 16951
decon_atomic_begin and decon_atomic_flush protects all windows already.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
b/drivers/gpu/drm/exynos/exynos5433_drm_de
Resetting IP at starting ensures that DECON will be in known state
regardless of changes by bootloader.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
b/drivers/gp
HDMI-PHY power off bit defaults to 0 in older HDMI versions.
In case of Exynos5433 it defaults to 1. To make code
consistent across all versions this bit is always unset/set in
power on/off sequences.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/exynos/exynos_hdmi.c | 4
1 file changed,
DECON should be updated after un-protecting windows and after changing
output parameters, otherwise image is not displayed in case of HDMI path.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
d
Proper PHY configuration should be as follow:
1. set HDMI clock parents to OSCCLK.
2. reconfigure PHY.
3. set HDMI clock parents to PHY.
4. wait for PLL stabilization.
The patch fixes it and consolidates the code.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/exynos/exynos_hdmi.c | 22 ++
Hi Inki,
In case of some pipielines there is need to set clock in one component
by driver of another component, for example:
1. Decon and Mixer driver must enable HDMI-PHY clock before configuration.
2. DP driver must enable DP clock provided by FIMD.
This set of patches provide more generic solu
The helper abstracts out conversion from pipeline
to crtc. Currently it is used in two places, but
there will be more uses in next patches.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/exynos/exynos_drm_crtc.c | 10 --
drivers/gpu/drm/exynos/exynos_drm_drv.h | 8
2 files c
Components belonging to the same pipeline often requires
synchronized clocks. Such clocks are sometimes provided
by external clock controller, but they can be also provided by
pipeline components. In latter case there should be a way
to access them from another component belonging to the same pipel
clock_enable callback is used only by FIMD->DP pipeline. Similar but more
universal functionality provides pipeline clock.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/exynos/exynos_dp_core.c | 8 ++--
drivers/gpu/drm/exynos/exynos_drm_drv.h | 5 -
drivers/gpu/drm/exynos/exynos_d
According to documentation and tests HDMI-PHY must be on prior
to MIXER configuration.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
b/drivers/gpu/drm/exynos/ex
HDMI-PHY clock should be accessible from other components in the pipeline.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/exynos/exynos_hdmi.c | 67 ++--
1 file changed, 48 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c
b/driv
According to documentation HDMI-PHY must be on prior to MIXER configuration.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/exynos/exynos_mixer.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c
b/drivers/gpu/drm/exynos/exynos_mixer.c
index 0a5a600
Hi David,
On Wed, 2016-03-23 at 12:13 +0100, David Herrmann wrote:
> Hi
>
> On Wed, Mar 23, 2016 at 9:42 AM, Alexey Brodkin
> wrote:
> >
> > As a pair to already existing drm_connector_unregister_all() we're adding
> > generic implementation of what is already done in some drivers.
> >
> > Onc
https://bugzilla.kernel.org/show_bug.cgi?id=115141
Alex Deucher changed:
What|Removed |Added
CC||alexdeucher at gmail.com
--- Comment #3 f
e very helpful.
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Hi Sumit,
2016-03-21 Sumit Semwal :
> Thanks for the patch, Gustavo!
>
> On 18 March 2016 at 19:49, Gustavo Padovan wrote:
> > From: Gustavo Padovan
> >
> > sync_file is useful to connect one or more fences to the file. The file is
> > used by userspace to track fences.
> >
> I think it is wor
On 19 January 2016 at 17:12, John Harrison wrote:
> On 19/01/2016 15:23, Gustavo Padovan wrote:
>>
>> Hi Daniel,
>>
>> 2016-01-19 Daniel Vetter :
>>
>>> On Fri, Jan 15, 2016 at 12:55:10PM -0200, Gustavo Padovan wrote:
From: Gustavo Padovan
This patch series de-stage the sync f
Hi
On Wed, Mar 23, 2016 at 12:56 PM, Chris Wilson
wrote:
> On Wed, Mar 23, 2016 at 12:30:42PM +0100, David Herrmann wrote:
>> My question was rather about why we do this? Semantics for EINTR are
>> well defined, and with SA_RESTART (default on linux) user-space can
>> ignore it. However, looping
On Wed, Mar 23, 2016 at 04:32:59PM +0100, David Herrmann wrote:
> Hi
>
> On Wed, Mar 23, 2016 at 12:56 PM, Chris Wilson
> wrote:
> > On Wed, Mar 23, 2016 at 12:30:42PM +0100, David Herrmann wrote:
> >> My question was rather about why we do this? Semantics for EINTR are
> >> well defined, and wi
On Tue, Mar 22, 2016 at 5:05 PM, Nicolai Stange wrote:
> The values of all but the RADEON_HPD_NONE members of the radeon_hpd_id
> enum transform 1:1 into bit positions within the 'enabled' bitset as
> assembled by evergreen_hpd_init():
>
> enabled |= 1 << radeon_connector->hpd.hpd;
>
> However,
Hi everyone,
The Allwinner SoCs (except for the very latest ones) all share the
same set of controllers, loosely coupled together to form the display
pipeline.
Depending on the SoC, the number of instances of the controller will
change (2 instances of each in the A10, only one in the A13, for
exa
The composite clock didn't have any unregistration function, which forced
us to use clk_unregister directly on it.
While it was already not great from an API point of view, it also meant
that we were leaking the clk_composite structure allocated in
clk_register_composite.
Add a clk_unregister_com
The A10 SoCs and its relatives has a special clock controller to drive the
display engines (both frontend and backend), that have a lot in common with
the clock to drive the first TCON channel.
Add a driver to support both.
Signed-off-by: Maxime Ripard
Acked-by: Rob Herring
---
Documentation/d
The A10 SoCs and relatives have a PLL controller to drive the PLL3 and
PLL7, clocked from a 3MHz oscillator, that drives the display related
clocks (GPU, display engine, TCON, etc.)
Add a driver for it.
Acked-by: Rob Herring
Acked-by: Chen-Yu Tsai
Signed-off-by: Maxime Ripard
---
Documentatio
The TCON is a controller generating the timings to output videos signals,
acting like both a CRTC and an encoder.
It has two channels depending on the output, each channel being driven by
its own clock (and own clock controller).
Add a driver for the channel 1 clock.
Signed-off-by: Maxime Ripard
The Allwinner SoCs have a gate controller to gate the access to the DRAM
clock to the some devices that need to access the DRAM directly (mostly
display / image related IPs).
Use a simple gates driver to support the one found in the A13 / R8 SoCs.
Signed-off-by: Maxime Ripard
Acked-by: Chen-Yu T
The TCON, tv-encoder and display engine backends and frontends are combined
to create our display pipeline.
Add them to the R8 DTSI. It's supposed to be perfectly compatible with the
A10s and A13, but since we haven't tested it on them yet, it's safer to
just enable it on the R8. Eventually, it sh
Enable the pll3 and pll7 clocks in the DT that are used to drive the
display-related clocks.
Signed-off-by: Maxime Ripard
Acked-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun5i.dtsi | 43 +++
1 file changed, 43 insertions(+)
diff --git a/arch/arm/boot/dts/su
Add the settings to support the NTSC standard.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/sun4i/sun4i_tv.c | 45
1 file changed, 45 insertions(+)
diff --git a/drivers/gpu/drm/sun4i/sun4i_tv.c b/drivers/gpu/drm/sun4i/sun4i_tv.c
index ccf275a90132..b
The CHIP has a composite output available muxed with the microphone in the
micro-jack plug.
Enable the composite output in its DTS.
Signed-off-by: Maxime Ripard
---
arch/arm/boot/dts/sun5i-r8-chip.dts | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/sun5i-r8-c
The DRAM gates control whether the image / display devices on the SoC have
access to the DRAM clock or not.
Enable it.
Signed-off-by: Maxime Ripard
---
arch/arm/boot/dts/sun5i-a13.dtsi | 22 +-
arch/arm/boot/dts/sun5i-r8.dtsi | 2 +-
2 files changed, 22 insertions(+), 2 de
It turns out that the A13 / R8 also have a tve encoder block, and a gate
for it.
Add it to the DT.
Signed-off-by: Maxime Ripard
Acked-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun5i-a13.dtsi | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/sun5i-a13.dt
The display pipeline of the Allwinner A10 is involving several loosely
coupled components.
Add a documentation for the bindings.
Signed-off-by: Maxime Ripard
---
.../bindings/display/sunxi/sun4i-drm.txt | 254 +
1 file changed, 254 insertions(+)
create mode 100644
Enable the display and TCON (channel 0 and channel 1) clocks that are going
to be needed to drive the display engine, tcon and TV encoders.
Acked-by: Chen-Yu Tsai
Signed-off-by: Maxime Ripard
---
arch/arm/boot/dts/sun5i-a13.dtsi | 38 +-
arch/arm/boot/dts/sun
One of the A10 display pipeline possible output is an RGB interface to
drive LCD panels directly. This is done through the first channel of the
TCON that will output our video signals directly.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/sun4i/Makefile | 1 +
drivers/gpu/drm/sun4i/sun
Some Allwinner SoCs have an IP called the TV encoder that is used to output
composite and VGA signals. In such a case, we need to use the second TCON
channel.
Add support for that TV encoder.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/sun4i/Makefile | 2 +
drivers/gpu/drm/sun4i/sun4i_
Add support for the Olimex LCD-OLinuXino-4.3TS panel to the DRM simple
panel driver.
It is a 480x272 panel connected through a 24-bits RGB interface.
Signed-off-by: Maxime Ripard
Acked-by: Rob Herring
---
.../display/panel/olimex,lcd-olinuxino-43-ts.txt | 7 ++
drivers/gpu/drm/panel/pan
Otherwise, building with DEBUG_FS enabled will trigger a build warning
because we're using a structure that has not been declared.
Signed-off-by: Maxime Ripard
---
include/drm/drm_fb_cma_helper.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/drm/drm_fb_cma_helper.h b/include/drm/
The Allwinner A10 and subsequent SoCs share the same display pipeline, with
variations in the number of controllers (1 or 2), or the presence or not of
some output (HDMI, TV, VGA) or not.
Add a driver with a limited set of features for now, and we will hopefully
support all of them eventually
Sig
Now that we have support for the composite output, we can start adding new
supported standards. Start with PAL, and we will add other eventually.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/sun4i/sun4i_tv.c | 42
1 file changed, 42 insertions(+)
dif
Allow the possibility to return an copy of the injected EDID when the connector
has been forced and an EDID has been specified over the debugfs interface.
Signed-off-by: Marius Vlad
---
drivers/gpu/drm/drm_edid.c | 23 ---
1 file changed, 20 insertions(+), 3 deletions(-)
dif
Den 18.03.2016 18:47, skrev Daniel Vetter:
> On Thu, Mar 17, 2016 at 10:51:55PM +0100, Noralf Trønnes wrote:
>> Den 16.03.2016 16:11, skrev Daniel Vetter:
>>> On Wed, Mar 16, 2016 at 02:34:15PM +0100, Noralf Trønnes wrote:
tinydrm provides a very simplified view of DRM for displays that has
got artifacts without any feedback from kernel\xorg
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Our goal is to transition to our new DAL display stack. It is the
path we are validating internally for both the open and hybrid stacks
and will be the only display stack we support going forward with new
asics. When we initially released the patches, there were some rough
edges and quite a few t
On Wed, Mar 23, 2016 at 06:07:56PM +0100, Noralf Trønnes wrote:
>
> Den 18.03.2016 18:47, skrev Daniel Vetter:
> >On Thu, Mar 17, 2016 at 10:51:55PM +0100, Noralf Trønnes wrote:
> >>Den 16.03.2016 16:11, skrev Daniel Vetter:
> >>>On Wed, Mar 16, 2016 at 02:34:15PM +0100, Noralf Trønnes wrote:
>
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Hey
On Wed, Mar 16, 2016 at 2:34 PM, Noralf Trønnes wrote:
> tinydrm provides a very simplified view of DRM for displays that has
> onboard video memory and is connected through a slow bus like SPI/I2C.
>
> Signed-off-by: Noralf Trønnes
> ---
> drivers/gpu/drm/Kconfig
This patch set adds kernel support for the new Polaris asics. Patches
that add support for userspace and new firmware will be out momentarily.
Support is included for:
- GFX
- UVD
- VCE
- Power management
- Displays
The display support requires DAL and this patch set requires the core
dal support
New uniphy transmitter setup table for elm/baf.
Reviewed-by: Christian König
Signed-off-by: Alex Deucher
Reviewed-by: Jammy Zhou
---
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c | 51 +-
1 file changed, 50 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/am
New PLL scheme on ELM/BAF.
Reviewed-by: Christian König
Signed-off-by: Alex Deucher
Reviewed-by: Jammy Zhou
---
drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/dce_v11
Add support for the display configuration on elm/baf.
Reviewed-by: Christian König
Signed-off-by: Alex Deucher
Reviewed-by: Jammy Zhou
---
drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | 24 +++-
1 file changed, 23 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/am
update to internal version 893
v2: Pull in gfx_info changes from 898
Reviewed-by: Christian König
Signed-off-by: Alex Deucher
Reviewed-by: Jammy Zhou
---
drivers/gpu/drm/amd/include/atombios.h | 663 ++---
1 file changed, 619 insertions(+), 44 deletions(-)
diff -
New cmd table for ELM/BAF for setting the dispclock or
dprefclock.
Signed-off-by: Alex Deucher
Reviewed-by: Christian König
Reviewed-by: Jammy Zhou
---
drivers/gpu/drm/amd/amdgpu/atombios_crtc.c | 45 +-
drivers/gpu/drm/amd/amdgpu/atombios_crtc.h | 2 ++
2 files c
New version of the SetPixelClock table for elm/baf. The
new table calculates the pll dividers and handles spread
spectrum calculations and setup.
Reviewed-by: Christian König
Signed-off-by: Alex Deucher
Reviewed-by: Jammy Zhou
---
drivers/gpu/drm/amd/amdgpu/atombios_crtc.c | 53 +
New digital encoder setup table for elm/baf.
Reviewed-by: Christian König
Signed-off-by: Alex Deucher
Reviewed-by: Jammy Zhou
---
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c | 42 ++
1 file changed, 42 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/atombios_
SetPixelClock table handles pll divider calculation and
spread spectrum setup, so no need to use calculate the
dividers and call the ss enable cmd table.
Reviewed-by: Christian König
Signed-off-by: Alex Deucher
Reviewed-by: Jammy Zhou
---
drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | 31 ++
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