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Hi all,
Today's linux-next merge of the drm-misc tree got a conflict in:
drivers/gpu/drm/i915/intel_dp.c
between commit:
893da0c9bcb2 ("drm/i915: check for return value")
from the drm-intel tree and commit:
13a3d91f17a5 ("drm: Pass 'name' to drm_encoder_init()")
from the drm-misc tree.
hit?
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Hi all,
Today's linux-next merge of the drm-misc tree got conflicts in:
drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
between commit:
8fbf9d92a7bc ("drm/vmwgfx: Implement the cursor_set2 callback v2")
from Linus' tree and
alled.
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Hi Dave,
This pull request includes runtime pm support, of_graph based dt binding
support for DP(Display Port) panel and cleanups for Exynos DRM IPP
enhancement.
Summary:
- Support runtime pm
. In case of most ARM SoC, each IP has each power domain which should be
controlled by eac
nts/20151214/7252b44d/attachment.html>
On 12/14/2015 02:12 AM, Stephen Rothwell wrote:
> Hi all,
>
> Today's linux-next merge of the drm-misc tree got conflicts in:
>
> drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
> drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
> drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c
>
> between commit:
>
> 8fbf9d92a7bc ("drm/vmwg
#x27;ll change the wording.
Tomi
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be able to get log
files and console output.
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Scholz ---
Oh, that probably should have been RESOLVED/FIXED.
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same patch makes resolving the
conflict much harder.
Tomi
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things, but also to spare
> Tomi (and others) the need to reinvent them :-)
I don't mind doing another round if you point out the nitpicks. I'm
hopeful that I'll get around to respinning sooner this time. =)
Thierry
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On Thu, Dec 10, 2015 at 11:28:58AM +0100, David Herrmann wrote:
> Hi
>
> On Mon, Nov 30, 2015 at 3:17 AM, Kirill A. Shutemov
> wrote:
> > There are few defects in vga_get() related to signal hadning:
> >
> > - we shouldn't check for pending signals for TASK_UNINTERRUPTIBLE
> > case;
> >
> >
On Mon, Dec 14, 2015 at 07:24:29AM +, Song, Ruiling wrote:
>
>
> > -Original Message-
> > From: hoegsberg at gmail.com [mailto:hoegsberg at gmail.com] On Behalf Of
> > Kristian H?gsberg
> > Sent: Monday, December 14, 2015 1:34 PM
> > To: Song, Ruiling
> > Cc: Winiarski, Michal ; inte
On Mon, Dec 14, 2015 at 07:14:09AM +0100, Stefan Lippers-Hollmann wrote:
> Hi
>
> On 2015-12-10, Daniel Vetter wrote:
> > On Thu, Dec 10, 2015 at 04:04:20AM +0100, Stefan Lippers-Hollmann wrote:
> > > On 2015-11-09, Dave Airlie wrote:
> [...]
> > > This patch seems to introduce a regression for i9
The series of patches coverting drm rockchip to atomic API, do some
cleanup and some fixes on atomic side.
TODO: fence is not support on current version.
Tested on rk3288 popmetal board.
All guys can test it with following url:
test case: https://github.com/markyzq/libdrm.git atomictest
kernel
No functional update, drm_vblank_* is the legacy version of
drm_crtc_vblank_*. and use new api make driver more clean.
Signed-off-by: Mark Yao
---
Changes in v2: None
drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 13 +++--
drivers/gpu/drm/rockchip/rockchip_drm_drv.h |7 +++
dr
For vop, power by enable/disable is more suitable then legacy dpms
function, and enable/disable more closely to the new atomic API.
Signed-off-by: Mark Yao
---
Changes in v2: None
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 37 +++
1 file changed, 4 insertions(+), 33
Rockchip vop not support hw vblank counter, needed check the committed
register if it's really take effect.
Signed-off-by: Mark Yao
Signed-off-by: Tomasz Figa
---
Changes in v2:
- Optimization commit planes sequence.
- Get vblank count on atomic_begin to protect vblank event.
Adviced by Daniel S
Rk3288 vop timing registers is immediately register, when configure
timing on display active time, will cause tearing. use dclk reset is
not a good idea to avoid this tearing. we can avoid tearing by using
standby register.
Vop standby register will take effect at end of current frame, and
go back
On Sat, Dec 12, 2015 at 03:16:59PM +, Emil Velikov wrote:
> On 11 December 2015 at 21:55, Jesse Barnes
> wrote:
> > Pick up context flags, softpin, etc.
> >
> > Signed-off-by: Jesse Barnes
> > ---
> > include/drm/i915_drm.h | 57
> > ++
> > 1
If drm core requests a async commit, rockchip_drm_atomic_commit
will schedule a work task to update later.
Signed-off-by: Mark Yao
---
Changes in v2:
- serialize outstanding asynchronous commits
drivers/gpu/drm/rockchip/rockchip_drm_drv.c |3 +
drivers/gpu/drm/rockchip/rockchip_drm_drv.h |
Both connecter gate and out_mode are not conflict with mode set
configure. Direct setting connecter gate and out_mode, that allow
connector do rockchip_drm_crtc_mode_config after mode set.
Signed-off-by: Mark Yao
---
Changes in v2: None
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 40 ++
Fill atomic needed funcs with default atomic helper library.
Rockchip use dw_hdmi, and drm/rockchip will covert to atomic api,
we need dw_hdmi support atomic funcs.
Now another drm driver use dw_hdmi is imx, not yet atomic, so
check DRIVER_ATOMIC at runtime to spilt atomic and not atomic.
Cc: Ru
encoder.enable is more compatible to atomic api than encoder.prepare/commit
Signed-off-by: Mark Yao
---
Changes in v2: None
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 14 +-
1 file changed, 5 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.
On Mon, Dec 14, 2015 at 08:41:05AM +, Song, Ruiling wrote:
>
>
> > -Original Message-
> > From: Daniel Vetter [mailto:daniel.vetter at ffwll.ch] On Behalf Of Daniel
> > Vetter
> > Sent: Monday, December 14, 2015 4:28 PM
> > To: Song, Ruiling
> > Cc: krh at bitplanet.net; Winiarski, M
Hi Inki,
On 2015-12-11 15:52, Inki Dae wrote:
> 2015-12-11 20:27 GMT+09:00 Marek Szyprowski :
>> On 2015-12-11 10:57, Inki Dae wrote:
>>> 2015ë
12ì 11ì¼ 18:26ì Marek Szyprowski ì´(ê°) ì´ ê¸:
On 2015-12-11 10:02, Inki Dae wrote:
> I found out why NULL point access happened. That
Hi Dave,
Last (very likely at least) drm-misc pull for 4.5. 3 big things:
- piles of docs for kms vtables.
- drm.debug dmesg output prettification from Ville (i915 parts are for 4.6
I think)
- connector mode probing/validating/merging cleanup from Ville.
>From that last pile please cherry-pick
> -Original Message-
> From: Intel-gfx [mailto:intel-gfx-bounces at lists.freedesktop.org] On Behalf
> Of Micha? Winiarski
> Sent: Wednesday, September 9, 2015 10:07 PM
> To: intel-gfx at lists.freedesktop.org
> Cc: Ben Widawsky ; dri-devel at lists.freedesktop.org;
> mesa-dev at lists.free
report back if anything
changes - or if I can reproduce the problem again.
Regards
Stefan Lippers-Hollmann
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> -Original Message-
> From: hoegsberg at gmail.com [mailto:hoegsberg at gmail.com] On Behalf Of
> Kristian H?gsberg
> Sent: Monday, December 14, 2015 1:34 PM
> To: Song, Ruiling
> Cc: Winiarski, Michal ; intel-
> gfx at lists.freedesktop.org; mesa-dev at lists.freedesktop.org; Ben Widaw
> -Original Message-
> From: Daniel Vetter [mailto:daniel.vetter at ffwll.ch] On Behalf Of Daniel
> Vetter
> Sent: Monday, December 14, 2015 4:28 PM
> To: Song, Ruiling
> Cc: krh at bitplanet.net; Winiarski, Michal ;
> mesa-dev at lists.freedesktop.org; intel-gfx at lists.freedesktop.org
Hi Marek,
2015ë
12ì 14ì¼ 18:15ì Marek Szyprowski ì´(ê°) ì´ ê¸:
> Hi Inki,
>
> On 2015-12-11 15:52, Inki Dae wrote:
>> 2015-12-11 20:27 GMT+09:00 Marek Szyprowski :
>>> On 2015-12-11 10:57, Inki Dae wrote:
2015ë
12ì 11ì¼ 18:26ì Marek Szyprowski ì´(ê°) ì´ ê¸:
> On 201
Am Freitag, den 11.12.2015, 15:02 +0800 schrieb Shawn Guo:
> On Fri, Dec 04, 2015 at 03:00:04PM +0100, Lucas Stach wrote:
> > This adds the device nodes for 2D, 3D and VG GPU cores.
> >
> > Signed-off-by: Russell King
> > Signed-off-by: Lucas Stach
> > ---
> > arch/arm/boot/dts/imx6dl.dtsi |
lt;http://lists.freedesktop.org/archives/dri-devel/attachments/20151214/00bfebcb/attachment.html>
Hi
On Mon, Dec 14, 2015 at 9:19 AM, Kirill A. Shutemov
wrote:
> On Thu, Dec 10, 2015 at 11:28:58AM +0100, David Herrmann wrote:
>> Hi
>>
>> On Mon, Nov 30, 2015 at 3:17 AM, Kirill A. Shutemov
>> wrote:
>> > There are few defects in vga_get() related to signal hadning:
>> >
>> > - we shouldn't
Exynos platform has been fully converted to device tree, so old platform
device based init data can be now removed.
Signed-off-by: Marek Szyprowski
---
drivers/gpu/drm/exynos/exynos_mixer.c | 28 ++--
1 file changed, 6 insertions(+), 22 deletions(-)
diff --git a/drivers/
Hi Dave,
I would like to include the HDLCD driver in the -next builds
in preparation for inclusion into v4.5. It is a new driver
so it should not impact much the overall DRM stability.
Please let me know if there are any questions or issues.
Many thanks,
Liviu
The following changes since commit
On 14 December 2015 at 09:04, Daniel Vetter wrote:
> On Mon, Dec 14, 2015 at 08:41:05AM +, Song, Ruiling wrote:
>>
>>
>> > -Original Message-
>> > From: Daniel Vetter [mailto:daniel.vetter at ffwll.ch] On Behalf Of Daniel
>> > Vetter
>> > Sent: Monday, December 14, 2015 4:28 PM
>> > To
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Op 04-12-15 om 09:12 schreef Daniel Vetter:
> On Thu, Dec 03, 2015 at 12:01:02PM +0100, Maarten Lankhorst wrote:
>> Op 03-12-15 om 10:53 schreef Daniel Vetter:
>>> On Tue, Nov 24, 2015 at 10:34:36AM +0100, Maarten Lankhorst wrote:
This allows iteration over encoders without requiring connectio
On Mon, Dec 14, 2015 at 11:20:00AM +0100, David Herrmann wrote:
> Hi
>
> On Mon, Dec 14, 2015 at 9:19 AM, Kirill A. Shutemov
> wrote:
> > On Thu, Dec 10, 2015 at 11:28:58AM +0100, David Herrmann wrote:
> >> Hi
> >>
> >> On Mon, Nov 30, 2015 at 3:17 AM, Kirill A. Shutemov
> >> wrote:
> >> > There
o maybe
it's related.
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From: Thierry Reding
This set of patches extends the existing DRM DP link helpers by caching
additional capabilities. It also reworks the helpers to make use of the
existing parsing helpers to reduce code duplication.
Thierry
Thierry Reding (12):
drm/dp: Add drm_dp_link_reset() implementation
From: Thierry Reding
Subsequent patches will add non-volatile fields to struct drm_dp_link,
so introduce a function to zero out only the volatile fields.
Signed-off-by: Thierry Reding
---
drivers/gpu/drm/drm_dp_helper.c | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff
From: Thierry Reding
Store capabilities in max_* fields and add separate fields for the
currently selected settings. This is useful to allow the current link
configuration to be stored without overwriting the capabilities.
Cc: Rob Clark
Signed-off-by: Thierry Reding
---
drivers/gpu/drm/drm_dp
From: Thierry Reding
Rather than storing capabilities as flags in an integer, use a separate
boolean per capability. This simplifies the code that checks for these
capabilities.
Cc: Rob Clark
Signed-off-by: Thierry Reding
---
drivers/gpu/drm/drm_dp_helper.c| 18 +++---
drivers
From: Thierry Reding
Use existing parsing helpers to probe a DisplayPort link.
Signed-off-by: Thierry Reding
---
drivers/gpu/drm/drm_dp_helper.c | 29 ++---
include/drm/drm_dp_helper.h | 2 ++
2 files changed, 24 insertions(+), 7 deletions(-)
diff --git a/drivers/
From: Thierry Reding
While probing the DisplayPort link, query the fast training capability.
If supported, drivers can use the fast link training sequence instead of
the more involved full link training sequence.
Signed-off-by: Thierry Reding
---
drivers/gpu/drm/drm_dp_helper.c | 3 +++
includ
From: Thierry Reding
The TPS3 capability can be exposed by DP 1.2 and later sinks if they
support the alternative training pattern for channel equalization.
Signed-off-by: Thierry Reding
---
drivers/gpu/drm/drm_dp_helper.c | 3 +++
include/drm/drm_dp_helper.h | 1 +
2 files changed, 4 inse
From: Thierry Reding
Make use of ANSI 8B/10B channel coding if the DisplayPort sink supports
it.
Signed-off-by: Thierry Reding
---
drivers/gpu/drm/drm_dp_helper.c | 12 +++-
include/drm/drm_dp_helper.h | 8
2 files changed, 19 insertions(+), 1 deletion(-)
diff --git a/dr
From: Thierry Reding
If the sink supports eDP, read the eDP revision from it's DPCD.
Signed-off-by: Thierry Reding
---
drivers/gpu/drm/drm_dp_helper.c | 15 +++
include/drm/drm_dp_helper.h | 8
2 files changed, 23 insertions(+)
diff --git a/drivers/gpu/drm/drm_dp_hel
From: Thierry Reding
If the transmitter supports pre-emphasis post cursor2 the sink will
request adjustments in a similar way to how it requests adjustments to
the voltage swing and pre-emphasis settings.
Add a helper to extract these adjustments on a per-lane basis from the
DPCD link status.
S
From: Thierry Reding
If the sink is eDP and supports the alternate scrambler reset, enable
it.
Signed-off-by: Thierry Reding
---
drivers/gpu/drm/drm_dp_helper.c | 11 +++
include/drm/drm_dp_helper.h | 1 +
2 files changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/drm_dp_help
From: Thierry Reding
Store the AUX read interval from DPCD, so that it can be used to wait
for the durations given in the specification during link training.
Signed-off-by: Thierry Reding
---
drivers/gpu/drm/drm_dp_helper.c | 4
include/drm/drm_dp_helper.h | 17 +
2 f
From: Thierry Reding
This helper chooses an appropriate configuration, according to the
bitrate requirements of the video mode and the capabilities of the
DisplayPort sink.
Signed-off-by: Thierry Reding
---
drivers/gpu/drm/drm_dp_helper.c | 55 +
include
On 14 December 2015 at 08:12, Thierry Reding
wrote:
> On Sat, Dec 12, 2015 at 03:26:09PM +, Emil Velikov wrote:
>> Hi Thierry, all,
>>
>> On 9 December 2015 at 17:37, Thierry Reding
>> wrote:
>> > From: Thierry Reding
>> >
>> > Some of the helpers, such as the pattern drawing helpers or th
From: Thierry Reding
Use microsecond sleeps for the clock recovery and channel equalization
delays during link training. The duration of these delays can be from
100 us up to 16 ms. It is rude to busy-loop for that amount of time.
While at it, also convert to standard coding style by putting the
Dove maintainers,
can you please tell me if you prefer the DT changes to go along with the
rest of the etnaviv series through the DRM tree, or plan on picking this
separate?
Regards,
Lucas
Am Mittwoch, den 09.12.2015, 12:48 +0100 schrieb Lucas Stach:
> From: Russell King
>
> Add DT support for
Between 4.4-rc3 and 4.4-rc4, i915 modesetting broke on my i5-2400 PC.
Instead of seeing the new dense graphics mode, I see the last VGA text
lines and no X appears either.
I saw something similar on I865G but have not had time to check if it is
the same issue.
ac9b8236551d1177fd07b56aef9b565d1
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h the cracks. Applied now, thanks.
Thierry
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On Mon, Dec 14, 2015 at 02:21:56PM +0100, Thierry Reding wrote:
> From: Thierry Reding
>
> Use microsecond sleeps for the clock recovery and channel equalization
> delays during link training. The duration of these delays can be from
> 100 us up to 16 ms. It is rude to busy-loop for that amount o
Hi
On Thu, Dec 10, 2015 at 2:28 PM, Martin Peres
wrote:
> Yes, you are right, it will require changes for the non-X case.
>
> Since you spent a lot of time on it, could you share with us some of the
> issues you found? We still think that using the DRM interface may be more
> work, but at least i
On Mon, Dec 14, 2015 at 03:31:09PM +0200, Meelis Roos wrote:
> Between 4.4-rc3 and 4.4-rc4, i915 modesetting broke on my i5-2400 PC.
That would seem to be SNB.
> Instead of seeing the new dense graphics mode, I see the last VGA text
> lines and no X appears either.
That's a bit weird. SNB has
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On Mon, Dec 7, 2015 at 1:55 PM, Harry Wentland
wrote:
> Two minor patches for MST here. We were replying NACK to UP requests
> when we intended to ACK them. We were also not filling in the vcpi
> field for mst_mgr->payloads although it's defined. Saving the vcpi
> simplifies the new amdgpu MST im
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e file-local style. Other common
> section
I thought the colon was necessary for kerneldoc to turn it into a
section?
Overall, long overdue, so thanks for writing it up:
Acked-by: Thierry Reding
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On Mon, Dec 14, 2015 at 04:23:41PM +0100, Thierry Reding wrote:
> On Mon, Dec 14, 2015 at 04:48:09PM +0200, Ville Syrjälä wrote:
> > On Mon, Dec 14, 2015 at 02:21:56PM +0100, Thierry Reding wrote:
> > > From: Thierry Reding
> > >
> > > Use microsecond sleeps for the clock recovery and channel e
On Mon, Dec 14, 2015 at 04:58:13PM +0100, Thierry Reding wrote:
> On Tue, Dec 08, 2015 at 09:49:19AM +0100, Daniel Vetter wrote:
> [...]
> > @@ -187,6 +189,9 @@ struct drm_framebuffer_funcs {
> > * copying the current screen contents to a private buffer and blending
> > * between that and
Thanks, Alex.
Dave, will you pick these up when pulling from Alex's tree if he includes them?
Thanks,
Harry
From: Alex Deucher
Sent: Monday, December 14, 2015 10:26 AM
To: Wentland, Harry
Cc: Maling list - DRI developers
Subject: Re: [PATCH 0/2] Two smal
On Mon, Dec 14, 2015 at 05:14:47PM +, Wentland, Harry wrote:
> Thanks, Alex.
>
> Dave, will you pick these up when pulling from Alex's tree if he includes
> them?
I stuffed them into drm-misc, should land still for 4.5.
Cheers, Daniel
>
> Thanks,
> Harry
>
> _
affect the radeon module, right?
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"Song, Ruiling" writes:
>> -Original Message-
>> From: Daniel Vetter [mailto:daniel.vetter at ffwll.ch] On Behalf Of Daniel
>> Vetter
>> Sent: Monday, December 14, 2015 4:28 PM
>> To: Song, Ruiling
>> Cc: krh at bitplanet.net; Winiarski, Michal ;
>> mesa-dev at lists.freedesktop.org; int
ri-devel/attachments/20151214/d174a8e6/attachment.html>
"Song, Ruiling" writes:
>> -Original Message-
>> From: hoegsberg at gmail.com [mailto:hoegsberg at gmail.com] On Behalf Of
>> Kristian H?gsberg
>> Sent: Monday, December 14, 2015 1:34 PM
>> To: Song, Ruiling
>> Cc: Winiarski, Michal ; intel-
>> gfx at lists.freedesktop.org; mesa-dev at l
the bug.
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g.
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nt issue.
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Hi Tomi,
On Monday 14 December 2015 13:45:44 Tomi Valkeinen wrote:
> On 05/12/15 00:27, Laurent Pinchart wrote:
> > The GEM object free handler frees memory allocated by the driver using
> > the pointer to the drm_gem_object instead of the pointer to the
> > omap_gem_object that embeds it. This do
Kristian Høgsberg writes:
> "Song, Ruiling" writes:
>
>>> -Original Message-
>>> From: hoegsberg at gmail.com [mailto:hoegsberg at gmail.com] On Behalf Of
>>> Kristian H?gsberg
>>> Sent: Monday, December 14, 2015 1:34 PM
>>> To: Song, Ruiling
>>> Cc: Winiarski, Michal ; intel-
>>> gfx
Hi Emil,
On Monday 07 December 2015 14:13:43 Emil Velikov wrote:
> On 4 December 2015 at 22:27, Laurent Pinchart wrote:
> > The 8 high order bits of the buffer flags are reserved for internal use.
> > Mask them out from the flags passed by userspace.
>
> Ouch... I know that the Intel guys are pre
Hello,
This patch series implements support for dma_buf import in the omapdrm driver.
The patches are based on top of the latest drm-next branch and can be found in
my git tree at
git://linuxtv.org/pinchartl/fbdev.git omapdrm/dmabuf-import
The first two patches are unrelated fixes and en
The plane reset handler frees the plane state and allocates a new
default state, but when doing so attempt to free the plane state using
the base plane state pointer instead of casting it to the
driver-specific state object that has been allocated. Fix it by using
the omap_plane_atomic_destroy_stat
Several DRM core function prototypes refer to functions that don't exist
anymore and are thus obviously never called. Remove them.
Signed-off-by: Laurent Pinchart
---
drivers/gpu/drm/omapdrm/omap_gem.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/drivers/gpu/drm/omapdrm/omap_gem.c
b
Don't compile the fbdev emulation code when fbdev emulation support is
disabled.
Signed-off-by: Laurent Pinchart
---
drivers/gpu/drm/omapdrm/Makefile | 3 ++-
drivers/gpu/drm/omapdrm/omap_debugfs.c | 4
drivers/gpu/drm/omapdrm/omap_drv.c | 4
drivers/gpu/drm/omapdrm/omap_d
Reorder functions to get rid of forward declarations
Signed-off-by: Laurent Pinchart
---
drivers/gpu/drm/omapdrm/omap_gem.c | 90 +++---
1 file changed, 46 insertions(+), 44 deletions(-)
diff --git a/drivers/gpu/drm/omapdrm/omap_gem.c
b/drivers/gpu/drm/omapdrm/o
The structure contains data related to a device instance, it shouldn't
be a global variable.
While at it rename the usergart structures with an omap_drm_ prefix.
Signed-off-by: Laurent Pinchart
---
drivers/gpu/drm/omapdrm/omap_drv.h | 3 +++
drivers/gpu/drm/omapdrm/omap_gem.c | 54
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