On 2014ë
10ì 01ì¼ 15:19, YoungJun Cho wrote:
> For providing VBLANK information, drm_handle_vblank() should
> be called properly, but it is blocked by wait_vsync_event
> condition which is set by manager_ops->wait_for_vblank().
> So moves it out from wait_vsync_event routine.
Applied.
Thanks
On 2014ë
11ì 13ì¼ 18:54, YoungJun Cho wrote:
> Hi Inki,
>
> On 11/13/2014 06:12 PM, Inki Dae wrote:
>> On 2014ë
10ì 01ì¼ 15:19, YoungJun Cho wrote:
>>> The I80 interface uses SYS_WE and SYS_CS to process
>>> 1 pixel data, so it requires the twice faster clock
>>> than the pixel clock.
>>
On 2014ë
10ì 01ì¼ 15:19, YoungJun Cho wrote:
> For the I80 interface, the video interrupt pending register(VIDINTCON1)
> should be handled in fimd_irq_handler() and the video interrupt control
> register(VIDINTCON0) should be handled in fimd_enable_vblank() and
> fimd_disable_vblank() like RGB
On 2014ë
10ì 01ì¼ 15:19, YoungJun Cho wrote:
> The drm_helper_hpd_irq_event() does dpms control and panel is
> initialized and displayed on by it.
> So should register TE irq handler(exynos_dsi_te_irq_handler())
> beforehand.
This patch also includes some codes not relevant to register TE irq
se:
You are the assignee for the bug.
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On 2014ë
10ì 01ì¼ 15:19, YoungJun Cho wrote:
> The command mode panel should draw image earlier than the display
> on command execution to prevent showing garbage GRAM screen data.
> So should set dsi->state as DSIM_STATE_ENABLED between calling
> exynos_dsi_set_display_enable() and drm_panel_
Hi Inki,
On 11/14/2014 10:49 AM, Inki Dae wrote:
> On 2014ë
10ì 01ì¼ 15:19, YoungJun Cho wrote:
>> The drm_helper_hpd_irq_event() does dpms control and panel is
>> initialized and displayed on by it.
>> So should register TE irq handler(exynos_dsi_te_irq_handler())
>> beforehand.
>
> This pat
||
--
You are receiving this mail because:
You are the assignee for the bug.
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There's no such thing as "list_struct".
Signed-off-by: Andrey Utkin
---
drivers/gpu/drm/radeon/mkregtable.c | 24
drivers/media/pci/cx18/cx18-driver.h | 2 +-
include/linux/list.h | 34 +-
include/linux/plist.h
The exynos fimd provides video type selection bits from system register
but exynos3 series don't has it, so needs has_vtsel flag and we can
distinguish whether set video type selection bits.
Signed-off-by: Joonyoung Shim
---
Changelog from v1:
- rebase on latest exynos-drm-next branch
- add has_v
It's better to be checking whether triggerring in fimd_trigger function.
Also it will return if in triggerring on fimd_te_handler, then it can't
execute remain codes.
Signed-off-by: Joonyoung Shim
---
Based on lastest exynos-drm-next branch.
drivers/gpu/drm/exynos/exynos_drm_fimd.c | 14 +++
The drm_handle_vblank should be called whenever be vsync, te interrupt
means vsync on i80 interface.
Signed-off-by: Joonyoung Shim
---
Based on lastest exynos-drm-next branch and patch of Youngjun Cho
("drm/exynos: fimd: move handle vblank position in TE handler").
drivers/gpu/drm/exynos/exynos
On 2014ë
11ì 07ì¼ 22:53, Krzysztof Kozlowski wrote:
> Add runtime Power Management to the Exynos DSI driver so the LCD power
> domain could be turned off.
>
> This slightly reduces the energy consumption when screen is completely
> turned off. On Trats2 board when the system was idle the ener
On 2014ë
11ì 07ì¼ 22:53, Krzysztof Kozlowski wrote:
> During system resume from suspend to RAM the Exynos DRM driver forced
> CRTC mode thus turning display on (DPMS_ON). This lead to runtime resuming
> of DSI which failed because whole LCD power domain was off and it was
> not allowed to turn
On 2014ë
11ì 14ì¼ 11:36, Joonyoung Shim wrote:
> The exynos fimd provides video type selection bits from system register
> but exynos3 series don't has it, so needs has_vtsel flag and we can
> distinguish whether set video type selection bits.
Applied.
Thanks,
Inki Dae
>
> Signed-off-by: J
Hi JoonYoung,
On 11/14/2014 11:36 AM, Joonyoung Shim wrote:
> The drm_handle_vblank should be called whenever be vsync, te interrupt
> means vsync on i80 interface.
That's right.
>
> Signed-off-by: Joonyoung Shim
> ---
> Based on lastest exynos-drm-next branch and patch of Youngjun Cho
> ("drm/
Hi,
On 11/14/2014 02:01 PM, YoungJun Cho wrote:
> Hi JoonYoung,
>
> On 11/14/2014 11:36 AM, Joonyoung Shim wrote:
>> The drm_handle_vblank should be called whenever be vsync, te interrupt
>> means vsync on i80 interface.
>
> That's right.
>
>>
>> Signed-off-by: Joonyoung Shim
>> ---
>> Based o
Hi JoonYoung,
On 11/14/2014 02:12 PM, Joonyoung Shim wrote:
> Hi,
>
> On 11/14/2014 02:01 PM, YoungJun Cho wrote:
>> Hi JoonYoung,
>>
>> On 11/14/2014 11:36 AM, Joonyoung Shim wrote:
>>> The drm_handle_vblank should be called whenever be vsync, te interrupt
>>> means vsync on i80 interface.
>>
>>
On piÄ
, 2014-11-14 at 11:53 +0900, Inki Dae wrote:
> On 2014ë
11ì 07ì¼ 22:53, Krzysztof Kozlowski wrote:
> > Add runtime Power Management to the Exynos DSI driver so the LCD power
> > domain could be turned off.
> >
> > This slightly reduces the energy consumption when screen is completely
>
On Thu, Nov 13, 2014 at 05:23:05PM -0800, Matt Roper wrote:
> On Thu, Nov 13, 2014 at 02:51:32PM -0800, Matt Roper wrote:
> > Add the new driver entrypoints that will be called by the atomic plane
> > helpers.
> >
> > This patch does not actually switch over to the new plane helpers yet,
> > so th
Hi Alex,
we've got a few bug reports about the behavior of radeon driver on
machines with Intel+AMD "switchable graphics" (no Muxless). So far,
it seems that the sane only way to make the machine working is to get
back to the old vgaswitcheroo behavior via radeon.runpm=0. Without
it, radeon GPU
On 2014ë
11ì 07ì¼ 15:12, YoungJun Cho wrote:
> This patch adds fimd device node to exynos4415.dtsi.
>
Hi Kukjin,
Could you merge patch 3 and 4 to your tree? These are dt part for
Exynos4415 drm support. For drm patches, I already merged them.
Thanks,
Inki Dae
> Signed-off-by: YoungJun Ch
---
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On 14 November 2014 18:12, Takashi Iwai wrote:
> Hi Alex,
>
> we've got a few bug reports about the behavior of radeon driver on
> machines with Intel+AMD "switchable graphics" (no Muxless). So far,
> it seems that the sane only way to make the machine working is to get
> back to the old vgaswitc
On Thu, Nov 13, 2014 at 10:43:25AM -0800, Matt Roper wrote:
> Now that we have hooks to enable the atomic plane helpers, we can use
> the plane helpers for our .update_plane() and .disable_plane()
> entrypoints.
>
> Even though we'd already refactored our plane handling code into
> check/commit, w
At Fri, 14 Nov 2014 19:33:00 +1000,
Dave Airlie wrote:
>
> On 14 November 2014 18:12, Takashi Iwai wrote:
> > Hi Alex,
> >
> > we've got a few bug reports about the behavior of radeon driver on
> > machines with Intel+AMD "switchable graphics" (no Muxless). So far,
> > it seems that the sane onl
On Wed, Nov 12, 2014 at 11:59:47AM +0100, Daniel Vetter wrote:
> While looking through drm_crtc.c to double-check make locking changes
> I've noticed that there's a few other places that would now benefit
> from simplified return value handling.
>
> So let's flatten the control flow and replace an
A set of three patches to support adreno 4xx GPUs in msm-drm:
(1) Updated the a3xx and a4xx header files.
(2) Handle register offset differences between a3xx and a4xx GPUs.
(3) Added a4xx GPU support.
Changes since v1:
Addressed review comments from Rob.
-Reworked the register offset look-up table
Updated a3xx and a4xx headers, generated from rnndb files:
https://github.com/freedreno/envytools
Signed-off-by: Aravind Ganesan
---
drivers/gpu/drm/msm/adreno/a3xx.xml.h | 50 +-
drivers/gpu/drm/msm/adreno/a4xx.xml.h | 2062
+
2 files changed, 2102 insertions(+
Register offsets have changed between a3xx and a4xx GPUs.
To be able access these registers in common code, we create
a lookup table, and set of read-write APIs to access the
register through the lookup table.
Signed-off-by: Aravind Ganesan
---
drivers/gpu/drm/msm/adreno/a3xx_gpu.c | 99 +
Added a4xx GPU support.
Signed-off-by: Aravind Ganesan
---
drivers/gpu/drm/msm/Makefile | 1 +
drivers/gpu/drm/msm/adreno/a4xx_gpu.c | 612
+
drivers/gpu/drm/msm/adreno/a4xx_gpu.h | 34 ++
drivers/gpu/drm/msm/adreno/adreno_device.c | 13 +
On Fri, Nov 14, 2014 at 5:09 AM, Takashi Iwai wrote:
> At Fri, 14 Nov 2014 19:33:00 +1000,
> Dave Airlie wrote:
>>
>> On 14 November 2014 18:12, Takashi Iwai wrote:
>> > Hi Alex,
>> >
>> > we've got a few bug reports about the behavior of radeon driver on
>> > machines with Intel+AMD "switchable
At Fri, 14 Nov 2014 10:40:08 -0500,
Alex Deucher wrote:
>
> On Fri, Nov 14, 2014 at 5:09 AM, Takashi Iwai wrote:
> > At Fri, 14 Nov 2014 19:33:00 +1000,
> > Dave Airlie wrote:
> >>
> >> On 14 November 2014 18:12, Takashi Iwai wrote:
> >> > Hi Alex,
> >> >
> >> > we've got a few bug reports about
Hi Dave,
drm-intel-next-2014-11-07:
- skl watermarks code (Damien, Vandana, Pradeep)
- reworked audio codec /eld handling code (Jani)
- rework the mmio_flip code to use the vblank evade logic and wait for rendering
using the standard wait_seqno interface (Ander)
- skl forcewake support (Zhe Wang
andle it
properly, vgaswitcheroo would need to track the signal and ddc/hpd
muxes and propagate them to the drivers.
>
>> Setting radeon.runpm=0 does not disable PX, it just stops the kernel
>> driver from dynamically turning the dGPU on and off on demand.
>
> Yes. The user seem more happy with explicit power control. At least,
> better than this kind of surprises...
It should behave exactly the same if the user starts X without
explicitly powering down the dGPU. The pci entry just happens to
disappear without runpm so X doesn't try and load the radeon ddx. The
kernel driver is still loaded however. So it's not really a fix per
se.
Alex
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Hello Dave,
I'm resending this series because I haven't had any news despite for a
while.
This patch series reworks the flip-work framework to make it safe when
calling drm_flip_work_queue from atomic contexts.
The 2nd patch of this series is optional, as it only reworks
drm_flip_work_init proto
Now that we're using lists instead of kfifo to store drm flip-work tasks
we do not need the size parameter passed to drm_flip_work_init function
anymore.
Moreover this function cannot fail anymore, we can thus remove the return
code.
Modify drm_flip_work_init users to take account of these changes
Make use of lists instead of kfifo in order to dynamically allocate
task entry when someone require some delayed work, and thus preventing
drm_flip_work_queue from directly calling func instead of queuing this
call.
This allow drm_flip_work_queue to be safely called even within irq
handlers.
Add n
At Fri, 14 Nov 2014 12:29:17 -0500,
Alex Deucher wrote:
>
> On Fri, Nov 14, 2014 at 11:14 AM, Takashi Iwai wrote:
> > At Fri, 14 Nov 2014 10:40:08 -0500,
> > Alex Deucher wrote:
> >>
> >> On Fri, Nov 14, 2014 at 5:09 AM, Takashi Iwai wrote:
> >> > At Fri, 14 Nov 2014 19:33:00 +1000,
> >> > Dave
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Hi Dave,
Here is the pull request of amdkfd for 3.19.
There are three very minor changes vs. the v5 patch-set I released a week ago:
- Fix to the MAINTAINERS file, according to Joe Perches comments
- Update module version number to 0.7.0
- Update amdkfd-thunk interface number to 1.0
Here is the
On Thu, Nov 13, 2014 at 2:31 PM, Thomas Hellstrom
wrote:
> Hi!
>
> Could we perhaps get an ack from Radeon / Nouveau as well?
This needs to be rebased on a newer kernel to take into account the
userptr changes in radeon_mode_dumb_mmap() so they don't get lost.
With that fixed:
Acked-by: Alex Deu
For async commit, it is *intentional* that those locks are not held.
Daniel Vetter
Signed-off-by: Rob Clark
---
drivers/gpu/drm/drm_atomic_helper.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/gpu/drm/drm_atomic_helper.c
b/drivers/gpu/drm/drm_atomic_helper.c
index c0a07cb..fa
For async commit, it is *intentional* that those locks are not held.
Reviewed-by: Daniel Vetter
Signed-off-by: Rob Clark
---
opps, hit send too soon, disregard last one
drivers/gpu/drm/drm_atomic_helper.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/gpu/drm/drm_atomic_helper.
> -Original Message-
> From: Andrey Utkin [mailto:andrey.krieger.utkin at gmail.com]
> Sent: Thursday, November 13, 2014 8:10 PM
> To: linux-usb at vger.kernel.org; linux-kbuild at vger.kernel.org; linux-
> media at vger.kernel.org; linux-kernel at vger.kernel.org; dri-
> devel at lists.fre
Hi Linus,
exynos infinite loop regressions fixed
i915: one regression
radeon: one race condition on monitor probing
noveau: two regressions
tegra: one vblank regression fix.
Dave.
The following changes since commit 03dca708521d30153fc5c7e2ff136f780a7372c9:
Merge tag 'drm-intel-fixes-2014-11-
We found Freescale imx6 and Rockchip rk3288 and Ingenic JZ4780 (Xburst/MIPS)
use the interface compatible Designware HDMI IP, but they also have some
lightly differences, such as phy pll configuration, register width(imx hdmi
register is one byte, but rk3288 is 4 bytes width and can only be access
CHECK: Alignment should match open parenthesis
+ if ((hdmi->vic == 10) || (hdmi->vic == 11) ||
+ (hdmi->vic == 12) || (hdmi->vic == 13) ||
CHECK: braces {} should be used on all arms of this statement
+ if (hdmi->hdmi_data.video_mode.mdvi)
[...]
+ else {
[...]
Sign
Rockchip RK3288 hdmi is compatible with dw_hdmi
Signed-off-by: Andy Yan
---
Changes in v10:
- add more display mode support mpll configuration for rk3288
Changes in v9:
- move some phy configuration to platform driver
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5:
On 2014å¹´11æ14æ¥ 18:23, Zubair Lutfullah Kakakhel wrote:
> Hi Andy
>
> On 14/11/14 03:31, Andy Yan wrote:
>> Rockchip RK3288 hdmi is compatible with dw_hdmi
>>
>> Signed-off-by: Andy Yan
>>
>> ---
>>
>> Changes in v10:
>> - add more display mode support mpll configuration for rk3288
>>
>> Cha
We found Freescale imx6 and Rockchip rk3288 and Ingenic JZ4780 (Xburst/MIPS)
use the interface compatible Designware HDMI IP, but they also have some
lightly differences, such as phy pll configuration, register width(imx hdmi
register is one byte, but rk3288 is 4 bytes width and can only be access
From: Yakir Yang
keep the connector & birdge in dw_hdmi.c, handle encoder
in dw_hdmi-imx.c, as most of the encoder operation are
platform specific such as crtc select and panel format
set
Signed-off-by: Andy Yan
Signed-off-by: Yakir Yang
---
Changes in v11: None
Changes in v10: None
Changes
HDMI_IH_I2CMPHY_STAT0 is a clear on write register, which indicates i2cm
operation status(i2c transfer done or error), every hdmi phy register
configuration must check this register to make sure the configuration
has complete. But the indication bit should be cleared after check, otherwise
the corr
Rockchip RK3288 hdmi is compatible with dw_hdmi
Signed-off-by: Andy Yan
---
Changes in v11: None
Changes in v10:
- add more display mode support mpll configuration for rk3288
Changes in v9:
- move some phy configuration to platform driver
Changes in v8: None
Changes in v7: None
Changes in v6:
On Wed, 2014-11-12 at 19:25 -0800, Andy Lutomirski wrote:
> On 11/11/2014 10:43 AM, Ross Zwisler wrote:
> > Add support for the new pcommit instruction. This instruction was
> > announced in the document "Intel Architecture Instruction Set Extensions
> > Programming Reference" with reference numbe
On 14/11/14 11:08, Andy Yan wrote:
>
> On 2014å¹´11æ14æ¥ 18:55, Zubair Lutfullah Kakakhel wrote:
>>
>> On 14/11/14 10:53, Andy Yan wrote:
>>> Hi ZubairLK:
>>> Thanks for your review.
>>> On 2014å¹´11æ14æ¥ 18:19, Zubair Lutfullah Kakakhel wrote:
Hi Andy,
Nice work on this
From: Yakir Yang
keep the connector & birdge in dw_hdmi.c, handle encoder
in dw_hdmi-imx.c, as most of the encoder operation are
platform specific such as crtc select and panel format
set
Signed-off-by: Andy Yan
Signed-off-by: Yakir Yang
---
Changes in v10: None
Changes in v9: None
Changes i
Hi Andy,
Nice work on this patch series. Its getting better and better :).
On 14/11/14 03:27, Andy Yan wrote:
> hdmi phy clock symbol and transmission termination value
> can adjust platform specific to get the best SI
^Is this signal integrity?
A
On 14/11/14 11:13, Andy Yan wrote:
>
> On 2014å¹´11æ14æ¥ 18:53, Zubair Lutfullah Kakakhel wrote:
>>
>> On 14/11/14 10:37, Andy Yan wrote:
>>> On 2014å¹´11æ14æ¥ 18:23, Zubair Lutfullah Kakakhel wrote:
Hi Andy
On 14/11/14 03:31, Andy Yan wrote:
> Rockchip RK3288 hdmi is co
CHECK: Alignment should match open parenthesis
+ if ((hdmi->vic == 10) || (hdmi->vic == 11) ||
+ (hdmi->vic == 12) || (hdmi->vic == 13) ||
CHECK: braces {} should be used on all arms of this statement
+ if (hdmi->hdmi_data.video_mode.mdvi)
[...]
+ else {
[...]
Sign
some platform may not support all the display mode,
add mode_valid interface check it
Signed-off-by: Andy Yan
---
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Signed-off-by: Andy Yan
---
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8:
- Add documentation for rockchip dw hdmi
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
.../devicetree/bindings/vid
On Fri, Nov 14, 2014 at 05:09:55AM +0400, Andrey Utkin wrote:
> There's no such thing as "list_struct".
>
> Signed-off-by: Andrey Utkin
May as well get group rates on the acks... ;-)
Acked-by: Paul E. McKenney
> ---
> drivers/gpu/drm/radeon/mkregtable.c | 24
> dri
IMX6 and Rockchip RK3288 and JZ4780 (Ingenic Xburst/MIPS)
use the interface compatible Designware HDMI IP, but they
also have some lightly differences, such as phy pll configuration,
register width, 4K support, clk useage, and the crtc mux configuration
is also platform specific.
To reuse the imx
the original imx hdmi driver is under staging/imx-drm,
which depends on imx-drm, so move the imx hdmi driver out
to drm/bridge and rename imx-hdmi to dw_hdmi
Signed-off-by: Andy Yan
---
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes
hdmi phy clock symbol and transmission termination value
can adjust platform specific to get the best SI
also add mode_valid interface for some platform may not support
all the display mode
Signed-off-by: Andy Yan
---
Changes in v10:
- split generic dw_hdmi.c improvements from patch#11 (add rk
HDMI_IH_I2CMPHY_STAT0 is a clear on write register, which indicates i2cm
operation status(i2c transfer done or error), every hdmi phy register
configuration must check this register to make sure the configuration
has complete. But the indication bit should be cleared after check, otherwise
the corr
Signed-off-by: Andy Yan
---
Changes in v10: None
Changes in v9: None
Changes in v8:
- Add documentation for rockchip dw hdmi
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
.../devicetree/bindings/video/dw_hdmi-rockchip.t
Hi Andy
On 14/11/14 03:31, Andy Yan wrote:
> Rockchip RK3288 hdmi is compatible with dw_hdmi
>
> Signed-off-by: Andy Yan
>
> ---
>
> Changes in v10:
> - add more display mode support mpll configuration for rk3288
>
> Changes in v9:
> - move some phy configuration to platform driver
>
> Chang
On 14/11/14 10:37, Andy Yan wrote:
>
> On 2014å¹´11æ14æ¥ 18:23, Zubair Lutfullah Kakakhel wrote:
>> Hi Andy
>>
>> On 14/11/14 03:31, Andy Yan wrote:
>>> Rockchip RK3288 hdmi is compatible with dw_hdmi
>>>
>>> Signed-off-by: Andy Yan
>>>
>>> ---
>>>
>>> Changes in v10:
>>> - add more display
On 2014å¹´11æ14æ¥ 18:53, Zubair Lutfullah Kakakhel wrote:
>
> On 14/11/14 10:37, Andy Yan wrote:
>> On 2014å¹´11æ14æ¥ 18:23, Zubair Lutfullah Kakakhel wrote:
>>> Hi Andy
>>>
>>> On 14/11/14 03:31, Andy Yan wrote:
Rockchip RK3288 hdmi is compatible with dw_hdmi
Signed-off-by: A
IMX6 and Rockchip RK3288 and JZ4780 (Ingenic Xburst/MIPS)
use the interface compatible Designware HDMI IP, but they
also have some lightly differences, such as phy pll configuration,
register width, 4K support, clk useage, and the crtc mux configuration
is also platform specific.
To reuse the imx
the original imx hdmi driver is under staging/imx-drm,
which depends on imx-drm, so move the imx hdmi driver out
to drm/bridge and rename imx-hdmi to dw_hdmi
Signed-off-by: Andy Yan
---
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes
Signed-off-by: Andy Yan
---
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8:
- correct some spelling mistake
- modify ddc-i2c-bus and interrupt description
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in
On rockchip rk3288, only word(32-bit) accesses are
permitted for hdmi registers. Byte width accesses (writeb,
readb) generate an imprecise external abort.
Signed-off-by: Andy Yan
---
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes i
Em Thu, 13 Nov 2014 20:48:41 -0500
Steven Rostedt escreveu:
> On Fri, 14 Nov 2014 05:09:55 +0400
> Andrey Utkin wrote:
>
> > There's no such thing as "list_struct".
>
> I guess there isn't.
Indeed ;)
>
> >
> > Signed-off-by: Andrey Utkin
>
> Acked-by: Steven Rostedt
Acked-by: Mauro Carv
On Fri, Nov 14, 2014 at 1:07 PM, Ross Zwisler
wrote:
> On Wed, 2014-11-12 at 19:25 -0800, Andy Lutomirski wrote:
>> On 11/11/2014 10:43 AM, Ross Zwisler wrote:
>> > Add support for the new pcommit instruction. This instruction was
>> > announced in the document "Intel Architecture Instruction Set
All the sub-systems in mdss share the same irq. This change provides
the sub-systems with the interfaces to register/unregister their own
irq handlers.
With this change, struct mdp5_kms does not have to keep the hdmi or
edp context.
Signed-off-by: Hai Li
---
drivers/gpu/drm/msm/hdmi/hdmi.c
This change is to remove the hdmi structure from mdp kms data structure.
To do this, the initialization flow is re-arranged.
- hdmi_init is moved from modeset_init to hdmi_bind.
- hdmi_destroy is called by hdmi_unbind and the use of kref is abandoned.
- A new interface hdmi_set_encoder is intro
drm driver may probe before the i2c bus, so the driver should
defer probing until it is available
Signed-off-by: Andy Yan
---
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4:
- defer probe ddc i2c adapter
Ch
Signed-off-by: Andy Yan
---
Changes in v10: None
Changes in v9: None
Changes in v8:
- correct some spelling mistake
- modify ddc-i2c-bus and interrupt description
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
.../device
On rockchip rk3288, only word(32-bit) accesses are
permitted for hdmi registers. Byte width accesses (writeb,
readb) generate an imprecise external abort.
Signed-off-by: Andy Yan
---
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6:
- move some mod
Hi ZubairLK:
Thanks for your review.
On 2014å¹´11æ14æ¥ 18:19, Zubair Lutfullah Kakakhel wrote:
> Hi Andy,
>
> Nice work on this patch series. Its getting better and better :).
>
> On 14/11/14 03:27, Andy Yan wrote:
>> hdmi phy clock symbol and transmission termination value
>> can adjust pla
On 14/11/14 10:53, Andy Yan wrote:
> Hi ZubairLK:
>Thanks for your review.
> On 2014å¹´11æ14æ¥ 18:19, Zubair Lutfullah Kakakhel wrote:
>> Hi Andy,
>>
>> Nice work on this patch series. Its getting better and better :).
>>
>> On 14/11/14 03:27, Andy Yan wrote:
>>> hdmi phy clock symbol and
On 2014å¹´11æ14æ¥ 18:55, Zubair Lutfullah Kakakhel wrote:
>
> On 14/11/14 10:53, Andy Yan wrote:
>> Hi ZubairLK:
>> Thanks for your review.
>> On 2014å¹´11æ14æ¥ 18:19, Zubair Lutfullah Kakakhel wrote:
>>> Hi Andy,
>>>
>>> Nice work on this patch series. Its getting better and better :).
On 2014å¹´11æ14æ¥ 19:16, Zubair Lutfullah Kakakhel wrote:
>
> On 14/11/14 11:13, Andy Yan wrote:
>> On 2014å¹´11æ14æ¥ 18:53, Zubair Lutfullah Kakakhel wrote:
>>> On 14/11/14 10:37, Andy Yan wrote:
On 2014å¹´11æ14æ¥ 18:23, Zubair Lutfullah Kakakhel wrote:
> Hi Andy
>
> On
drm driver may probe before the i2c bus, so the driver should
defer probing until it is available
Signed-off-by: Andy Yan
---
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4:
- defer prob
RK3288 HDMI will not work without the spare bit of
HDMI_PHY_CONF0 enable
Signed-off-by: Andy Yan
---
Changes in v11:
- split from patch
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: N
I have a Caicos card, like this:
[3.077260] [drm] radeon kernel modesetting enabled.
[3.077338] checking generic (e000 60) vs hw (e000 1000)
[3.077339] fb: switching to radeondrmfb from EFI VGA
[3.077377] Console: switching to colour dummy device 80x25
[3.078881
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