[Bug 84500] [radeonsi] radeon 0000:01:00.0: Packet0 not allowed!

2014-10-13 Thread bugzilla-dae...@freedesktop.org
to hit the error with a 3.17-rc4 and something. -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20141013/30196cde/attachment.html>

[PATCH v2] gpu: drm: drm_dp_mst_topology.c: Fix improper use of strncat

2014-10-13 Thread Jani Nikula
On Sun, 12 Oct 2014, Rickard Strandqvist wrote: > Fixed wrong usage of strncat, switched to strlcpy. > While sending the string size to function to reduce > the potential for misuse in future. > > Signed-off-by: Rickard Strandqvist Reviewed-by: Jani Nikula > --- > drivers/gpu/drm/drm_dp_mst_t

[Bug 79980] Random radeonsi crashes

2014-10-13 Thread bugzilla-dae...@freedesktop.org
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[Linaro-mm-sig] [RFC 1/4] dma-buf: Add constraints sharing information

2014-10-13 Thread Daniel Vetter
On Mon, Oct 13, 2014 at 01:14:58AM -0700, Laura Abbott wrote: > On 10/11/2014 11:55 AM, Daniel Vetter wrote: > >On Sat, Oct 11, 2014 at 01:37:55AM +0530, Sumit Semwal wrote: > >>At present, struct device lacks a mechanism of exposing memory > >>access constraints for the device. > >> > >>Consequent

[Bug 79980] Random radeonsi crashes

2014-10-13 Thread bugzilla-dae...@freedesktop.org
. URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20141013/cf1a0f74/attachment.html>

[PATCH v2 01/15] drm/dsi: Make mipi_dsi_dcs_{read, write}() symmetrical

2014-10-13 Thread Thierry Reding
From: Thierry Reding Currently the mipi_dsi_dcs_write() function requires the DCS command byte to be embedded within the write buffer whereas mipi_dsi_dcs_read() has a separate parameter. Make them more symmetrical by adding an extra command parameter to mipi_dsi_dcs_write(). The S6E8AA0 driver

[PATCH 02/15] drm/dsi: Constify mipi_dsi_msg

2014-10-13 Thread Thierry Reding
From: Thierry Reding struct mipi_dsi_msg is a read-only structure, drivers should never need to modify it. Make this explicit by making all references to the struct const. Signed-off-by: Thierry Reding --- drivers/gpu/drm/exynos/exynos_drm_dsi.c | 2 +- include/drm/drm_mipi_dsi.h

[PATCH 03/15] drm/dsi: Add mipi_dsi_set_maximum_return_packet_size() helper

2014-10-13 Thread Thierry Reding
From: YoungJun Cho This function can be used to set the maximum return packet size for a MIPI DSI peripheral. Signed-off-by: YoungJun Cho [treding: endianess, kerneldoc, return value] Signed-off-by: Thierry Reding --- drivers/gpu/drm/drm_mipi_dsi.c | 30 ++ include

[PATCH 04/15] drm/panel: s6e8aa0: Use standard MIPI DSI function

2014-10-13 Thread Thierry Reding
From: Thierry Reding Use the newly introduced mipi_dsi_set_maximum_return_packet_size() function to replace an open-coded version. Signed-off-by: Thierry Reding --- drivers/gpu/drm/panel/panel-s6e8aa0.c | 16 ++-- 1 file changed, 2 insertions(+), 14 deletions(-) diff --git a/drive

[PATCH 05/15] drm/dsi: Implement generic read and write commands

2014-10-13 Thread Thierry Reding
From: Thierry Reding Implement generic read and write commands. Selection of the proper data type for packets is done automatically based on the number of parameters or payload length. Signed-off-by: Thierry Reding --- drivers/gpu/drm/drm_mipi_dsi.c | 115 ++

[PATCH 06/15] drm/dsi: Implement some standard DCS commands

2014-10-13 Thread Thierry Reding
From: YoungJun Cho Add helpers for the {enter,exit}_sleep_mode, set_display_{on,off} and set_tear_{on,off} DCS commands. Signed-off-by: YoungJun Cho [treding: kerneldoc and other minor cleanup] Signed-off-by: Thierry Reding --- drivers/gpu/drm/drm_mipi_dsi.c | 118

[PATCH 07/15] drm/dsi: Add to DocBook documentation

2014-10-13 Thread Thierry Reding
From: Thierry Reding Integrate the MIPI DSI helpers into DocBook and clean up various kerneldoc warnings. Also add a brief DOC section and clarify some aspects of the mipi_dsi_host struct's .transfer() operation. Signed-off-by: Thierry Reding --- Documentation/DocBook/drm.tmpl | 6 ++ dri

[PATCH 08/15] drm/dsi: Implement DCS nop command

2014-10-13 Thread Thierry Reding
From: Thierry Reding Provide a small convenience wrapper that transmits a DCS nop command. Signed-off-by: Thierry Reding --- drivers/gpu/drm/drm_mipi_dsi.c | 18 ++ include/drm/drm_mipi_dsi.h | 1 + 2 files changed, 19 insertions(+) diff --git a/drivers/gpu/drm/drm_mipi_d

[PATCH 09/15] drm/dsi: Implement DCS soft_reset command

2014-10-13 Thread Thierry Reding
From: Thierry Reding Provide a small convenience wrapper that transmits a DCS soft_reset command. Signed-off-by: Thierry Reding --- drivers/gpu/drm/drm_mipi_dsi.c | 18 ++ include/drm/drm_mipi_dsi.h | 1 + 2 files changed, 19 insertions(+) diff --git a/drivers/gpu/drm/drm

[PATCH 10/15] drm/dsi: Implement DCS get_power_mode command

2014-10-13 Thread Thierry Reding
From: Thierry Reding Provide a small convenience wrapper that transmits a DCS get_power_mode command. A set of bitmasks for the mode bits is also provided. Signed-off-by: Thierry Reding --- drivers/gpu/drm/drm_mipi_dsi.c | 21 + include/drm/drm_mipi_dsi.h | 7 +++

[PATCH 11/15] drm/dsi: Implement DCS {get,set}_pixel_format commands

2014-10-13 Thread Thierry Reding
From: Thierry Reding Provide small convenience wrappers to query or set the pixel format used by the interface. Signed-off-by: Thierry Reding --- drivers/gpu/drm/drm_mipi_dsi.c | 42 ++ include/drm/drm_mipi_dsi.h | 2 ++ 2 files changed, 44 insertio

[PATCH 13/15] drm/dsi: Always use low-power mode for DCS commands

2014-10-13 Thread Thierry Reding
From: Thierry Reding Many peripherals require DCS commands to be sent in low power mode and will fail to correctly process them in high speed mode. Section 5.2 of the MIPI DSI specification also mandates that on bidirectional lanes, data shall be transmitted in low power mode only. At worst this

[PATCH 12/15] drm/dsi: Implement DCS set_{column, page}_address commands

2014-10-13 Thread Thierry Reding
From: Thierry Reding Provide small convenience wrappers to set the column and page extents of the frame memory accessed by the host processors. Signed-off-by: Thierry Reding --- drivers/gpu/drm/drm_mipi_dsi.c | 46 ++ include/drm/drm_mipi_dsi.h | 4

[PATCH 14/15] drm/dsi: Resolve MIPI DSI device from phandle

2014-10-13 Thread Thierry Reding
From: Thierry Reding Add a function, of_find_mipi_dsi_device_by_node(), that can be used to resolve a phandle to a MIPI DSI device. Signed-off-by: Thierry Reding --- drivers/gpu/drm/drm_mipi_dsi.c | 23 +++ include/drm/drm_mipi_dsi.h | 1 + 2 files changed, 24 insertio

[PATCH 15/15] drm/panel: Add Sharp LQ101R1SX01 support

2014-10-13 Thread Thierry Reding
From: Thierry Reding This panel requires dual-channel mode. The device accepts command-mode data on 8 lanes and will therefore need a dual-channel DSI controller. The two interfaces that make up this device need to be instantiated in the controllers that gang up to provide the dual-channel DSI ho

[PATCH 01/14] gpu: host1x: Use struct host1x_bo pointers in traces

2014-10-13 Thread Thierry Reding
From: Thierry Reding Rather than cast to a u32 use the struct host1x_bo pointers directly. This avoid annoying warnings for 64-bit builds. Signed-off-by: Thierry Reding --- drivers/gpu/host1x/hw/channel_hw.c | 12 include/trace/events/host1x.h | 27 +++

[PATCH 03/14] gpu: host1x: Fix typo in comment

2014-10-13 Thread Thierry Reding
From: Thierry Reding Signed-off-by: Thierry Reding --- drivers/gpu/host1x/hw/cdma_hw.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/host1x/hw/cdma_hw.c b/drivers/gpu/host1x/hw/cdma_hw.c index a1197c40a454..072d8209c06c 100644 --- a/drivers/gpu/host1x/hw/cdma_h

[PATCH 02/14] gpu: host1x: Make mapped field of push buffers void *

2014-10-13 Thread Thierry Reding
From: Thierry Reding This reduces the amount of casting that needs to be done to get rid of annoying warnings on 64-bit builds. Signed-off-by: Thierry Reding --- drivers/gpu/host1x/cdma.c | 2 +- drivers/gpu/host1x/cdma.h | 2 +- drivers/gpu/host1x/hw/cdma_hw.c | 4 ++-- 3 files ch

[PATCH 04/14] gpu: host1x: Print address/offset pairs consistently

2014-10-13 Thread Thierry Reding
From: Thierry Reding Consistently use a format of %pad+%#x to print address/offset in debug messages. Signed-off-by: Thierry Reding --- drivers/gpu/host1x/hw/cdma_hw.c | 4 ++-- drivers/gpu/host1x/hw/debug_hw.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/g

[PATCH 05/14] gpu: host1x: Make gather offsets unsigned

2014-10-13 Thread Thierry Reding
From: Thierry Reding Use the u32 type for the offset in the host1x_job_gather structure for consistentcy with other structures. Negative offsets don't make sense in this context. Signed-off-by: Thierry Reding --- drivers/gpu/host1x/job.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) d

[PATCH 06/14] gpu: host1x: mipi: Registers are 32 bits wide

2014-10-13 Thread Thierry Reding
From: Thierry Reding On 64-bit platforms an unsigned long would be 64 bit and cause unnecessary casting when being passed to writel() or returned from readl(). Make register values 32 bits wide to avoid that. Signed-off-by: Thierry Reding --- drivers/gpu/host1x/mipi.c | 16 1

[PATCH 07/14] gpu: host1x: mipi: Preserve the contents of MIPI_CAL_CTRL

2014-10-13 Thread Thierry Reding
From: Sean Paul By paving the CTRL reg value, the current code changes MIPI_CAL_PRESCALE ("Auto-cal calibration step prescale") from 1us to 0.1us (val=0). In the description for PHY's noise filter (MIPI_CAL_NOISE_FLT), the TRM states that if the value of the prescale is 0 (or 0.1us), the filter s

[PATCH 08/14] gpu: host1x: mipi: Calibrate clock lanes

2014-10-13 Thread Thierry Reding
From: Sean Paul Include the clock lanes when calibrating the MIPI PHY on Tegra124 compatible devices. Signed-off-by: Sean Paul [treding at nvidia.com: bikeshedding] Signed-off-by: Thierry Reding --- drivers/gpu/host1x/mipi.c | 124 ++ 1 file changed

[PATCH 09/14] gpu: host1x: mipi: Set MIPI_CAL_BIAS_PAD_CFG1 register

2014-10-13 Thread Thierry Reding
From: Sean Paul During calibration, sets the "internal reference level for drive pull- down" to the value specified in the Tegra TRM. Signed-off-by: Sean Paul Signed-off-by: Thierry Reding --- drivers/gpu/host1x/mipi.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/host1x

[PATCH 10/14] drm/tegra: dc: Add powergate support

2014-10-13 Thread Thierry Reding
From: Thierry Reding Both display controllers are in their own power partition. Currently the driver relies on the assumption that these partitions are on (which is the hardware default). However some bootloaders may disable them, so the driver must make sure to turn them back on to avoid hangs.

[PATCH 11/14] drm/tegra: Do not enable output on .mode_set()

2014-10-13 Thread Thierry Reding
From: Thierry Reding The output is already enabled in .dpms(), doing it in .mode_set() too can cause noticable flicker. Signed-off-by: Thierry Reding --- drivers/gpu/drm/tegra/output.c | 6 -- 1 file changed, 6 deletions(-) diff --git a/drivers/gpu/drm/tegra/output.c b/drivers/gpu/drm/teg

[PATCH 12/14] drm/tegra: dsi: Make FIFO depths host parameters

2014-10-13 Thread Thierry Reding
From: Thierry Reding Rather than hardcoding them as macros, make the host and video FIFO depths parameters so that they can be more easily adjusted if a new generation of the Tegra SoC changes them. Signed-off-by: Thierry Reding --- drivers/gpu/drm/tegra/dsi.c | 10 ++ 1 file changed,

[PATCH 13/14] drm/tegra: dsi: Add ganged mode support

2014-10-13 Thread Thierry Reding
From: Thierry Reding Implement ganged mode support for the Tegra DSI driver. The DSI host controller to gang up with is specified via a phandle in the device tree and the resolved DSI host controller used for the programming of the ganged-mode registers. Signed-off-by: Thierry Reding --- .../b

[PATCH 14/14] drm/tegra: dsi: Set up PHY_TIMING & BTA_TIMING registers earlier

2014-10-13 Thread Thierry Reding
From: Sean Paul Make sure the DSI PHY_TIMING and BTA_TIMING registers are initialized when the clocks are set up as opposed to when the output is enabled. This makes sure that the PHY timings are properly set up when the panel is prepared and that DCS commands sent at that time use the appropriat

[PATCH 02/11] drm/radeon: stop re-reserving the BO in radeon_vm_bo_set_addr

2014-10-13 Thread Christian König
From: Christian K?nig That's useless when all callers drop the reservation immediately after calling the function. Signed-off-by: Christian K?nig --- drivers/gpu/drm/radeon/radeon_gem.c | 2 +- drivers/gpu/drm/radeon/radeon_kms.c | 2 -- drivers/gpu/drm/radeon/radeon_vm.c | 4 ++-- 3 files ch

[PATCH 10/11] drm/radeon: sync PT updates as shared if they are validating

2014-10-13 Thread Christian König
From: Christian K?nig Only invalidating PTEs needs to be executed synchronized to using the PT. Signed-off-by: Christian K?nig --- drivers/gpu/drm/radeon/radeon_vm.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/radeon/radeon_vm.c b/drivers/gpu/drm/rade

[PATCH 09/11] drm/radeon: sync PD updates as shared

2014-10-13 Thread Christian König
From: Christian K?nig We never invalidate PD entries and making them valid can run with other users in parallel. Signed-off-by: Christian K?nig --- drivers/gpu/drm/radeon/radeon_vm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/radeon/radeon_vm.c b/drive

[PATCH 11/11] drm/radeon: update the VM after setting BO address

2014-10-13 Thread Christian König
From: Christian K?nig This way the necessary VM update is kicked off immediately if all BOs involved are in GPU accessible memory. Signed-off-by: Christian K?nig --- drivers/gpu/drm/radeon/radeon_gem.c | 60 + 1 file changed, 60 insertions(+) diff --git a/d

[PATCH 08/11] drm/radeon: fence BO_VAs manually

2014-10-13 Thread Christian König
From: Christian K?nig This allows us to finally remove the VM fence and so allow concurrent use of it from different engines. Signed-off-by: Christian K?nig --- drivers/gpu/drm/radeon/radeon.h| 7 +++ drivers/gpu/drm/radeon/radeon_cs.c | 6 +- drivers/gpu/drm/radeon/radeon_vm.c |

[PATCH 05/11] drm/radeon: fence PT updates manually v2

2014-10-13 Thread Christian König
From: Christian K?nig This allows us to add the real execution fence as shared. v2: fix typo Signed-off-by: Christian K?nig --- drivers/gpu/drm/radeon/radeon_object.c | 19 ++ drivers/gpu/drm/radeon/radeon_object.h | 2 ++ drivers/gpu/drm/radeon/radeon_vm.c | 65 +

[PATCH 06/11] drm/radeon: track VM update fences separately

2014-10-13 Thread Christian König
From: Christian K?nig Note for each fence if it's a VM page table update or not. This allows us to determine the last VM update in a sync object and so to figure out if we need to flush the TLB or not. Signed-off-by: Christian K?nig --- drivers/gpu/drm/radeon/radeon.h | 18 ++

[PATCH 01/11] drm/radeon: rework vm_flush parameters

2014-10-13 Thread Christian König
From: Christian K?nig Use ring structure instead of index and provide vm_id and pd_addr separately. Signed-off-by: Christian K?nig --- drivers/gpu/drm/radeon/cik.c | 23 ++- drivers/gpu/drm/radeon/cik_sdma.c| 22 +- drivers/gpu/drm/radeon/ni.

[PATCH 04/11] drm/radeon: split semaphore and sync object handling v2

2014-10-13 Thread Christian König
From: Christian K?nig Previously we just allocated space for four hardware semaphores in each software semaphore object. Make software semaphore objects represent only one hardware semaphore address again by splitting the sync code into it's own object. v2: fix typo in comment Signed-off-by: Ch

[PATCH 03/11] drm/radeon: remove unnecessary VM syncs

2014-10-13 Thread Christian König
From: Christian K?nig The PD/PTs reservation object now contains everything needed. Signed-off-by: Christian K?nig --- drivers/gpu/drm/radeon/radeon_vm.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/radeon/radeon_vm.c b/drivers/gpu/drm/radeon/radeon_vm.c index 9c9aa62.

[PATCH 07/11] drm/radeon: use one VMID for each ring

2014-10-13 Thread Christian König
From: Christian K?nig Use multiple VMIDs for each VM, one for each ring. That allows us to execute flushes separately on each ring, still not ideal cause in a lot of cases rings can share IDs. Signed-off-by: Christian K?nig --- drivers/gpu/drm/radeon/cik.c | 4 +-- drivers/gpu/drm/radeo

[PATCH] drm/nouveau/disp: Use NULL for pointers

2014-10-13 Thread Thierry Reding
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[RFC PATCH 0/3] drm driver for baytrail's vxd392

2014-10-13 Thread Yao Cheng
drm/ipvr is a new GEM driver for baytrail's vxd392, which accelerates VP8 video decoding. The driver name "ipvr" means the PowerVR's IP wrapped by Intel. In the future, ipvr may support other platforms such as Merrifield. Code is placed at drivers/gpu/drm/ipvr and the following two new Kconfig ar

[RFC PATCH 1/3] drm/i915: add vxd392 bridge in i915

2014-10-13 Thread Yao Cheng
Setup following resources during i915_driver_load: 1. create a child platform and resource 2. allocate a new IRQ line and irq chip 3. set up IRQ mask/unmask callbacks vxd392 driver (if installed) will bind itself to the platform device and create new drm device Signed-off-by: Yao Cheng --- drive

[Linaro-mm-sig] [RFC 0/4] dma-buf Constraints-Enabled Allocation helpers

2014-10-13 Thread Laura Abbott
On 10/10/2014 1:07 PM, Sumit Semwal wrote: > Hi, > > Why: > > While sharing buffers using dma-buf, currently there's no mechanism to let > devices share their memory access constraints with each other to allow for > delayed allocation of backing storage. > > This RFC attempts to introduce th

[Linaro-mm-sig] [RFC 1/4] dma-buf: Add constraints sharing information

2014-10-13 Thread Laura Abbott
On 10/11/2014 11:55 AM, Daniel Vetter wrote: > On Sat, Oct 11, 2014 at 01:37:55AM +0530, Sumit Semwal wrote: >> At present, struct device lacks a mechanism of exposing memory >> access constraints for the device. >> >> Consequently, there is also no mechanism to share these constraints >> while sha

[Linaro-mm-sig] [RFC 2/4] cenalloc: Constraint-Enabled Allocation helpers for dma-buf

2014-10-13 Thread Laura Abbott
On 10/10/2014 1:07 PM, Sumit Semwal wrote: > Devices sharing buffers using dma-buf could benefit from sharing their > constraints via struct device, and dma-buf framework would manage the > common constraints for all attached devices per buffer. > > With that information, we could have a 'generic'

[RFC PATCH 2/3] drm/ipvr: drm driver for vxd392

2014-10-13 Thread Yao Cheng
Probes vxd392 on Baytrail platform and create a new drm device for hardware accelerated video decoding. Signed-off-by: Yao Cheng --- drivers/gpu/drm/Kconfig|2 + drivers/gpu/drm/Makefile |1 + drivers/gpu/drm/ipvr/Kconfig | 16 + drivers/gpu/drm/ipvr/Makefil

[RFC PATCH 3/3] libdrm: user mode helper for ipvr drm driver

2014-10-13 Thread Yao Cheng
usermode helper of ipvr drm driver. test tools: 1. test_ioctl: test kernel driver by directly ioctl 2. test_decode: test decode functionality by calling libdrm_ipvr Signed-off-by: Yao Cheng --- Makefile.am|6 +- Makefile.sources |1 + configure.ac | 26 +- i

[PATCH RESEND] regulator: Add stub for devm_regulator_get_exclusive

2014-10-13 Thread Mark Brown
ignature Size: 473 bytes Desc: Digital signature URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20141013/186fcd26/attachment.sig>

[PATCH v2 01/15] drm/dsi: Make mipi_dsi_dcs_{read,write}() symmetrical

2014-10-13 Thread Andrzej Hajda
Hi Thierry, On 10/13/2014 12:16 PM, Thierry Reding wrote: > From: Thierry Reding > > Currently the mipi_dsi_dcs_write() function requires the DCS command > byte to be embedded within the write buffer whereas mipi_dsi_dcs_read() > has a separate parameter. Make them more symmetrical by adding an e

[PATCH 02/15] drm/dsi: Constify mipi_dsi_msg

2014-10-13 Thread Andrzej Hajda
On 10/13/2014 12:16 PM, Thierry Reding wrote: > From: Thierry Reding > > struct mipi_dsi_msg is a read-only structure, drivers should never need > to modify it. Make this explicit by making all references to the struct > const. > > Signed-off-by: Thierry Reding Acked-by: Andrzej Hajda -- Reg

[PATCH 03/15] drm/dsi: Add mipi_dsi_set_maximum_return_packet_size() helper

2014-10-13 Thread Andrzej Hajda
On 10/13/2014 12:16 PM, Thierry Reding wrote: > From: YoungJun Cho > > This function can be used to set the maximum return packet size for a > MIPI DSI peripheral. > > Signed-off-by: YoungJun Cho > [treding: endianess, kerneldoc, return value] > Signed-off-by: Thierry Reding > --- > drivers/g

[PATCH 04/15] drm/panel: s6e8aa0: Use standard MIPI DSI function

2014-10-13 Thread Andrzej Hajda
On 10/13/2014 12:16 PM, Thierry Reding wrote: > From: Thierry Reding > > Use the newly introduced mipi_dsi_set_maximum_return_packet_size() > function to replace an open-coded version. > > Signed-off-by: Thierry Reding > --- > drivers/gpu/drm/panel/panel-s6e8aa0.c | 16 ++-- > 1 fi

[PATCH 03/15] drm/dsi: Add mipi_dsi_set_maximum_return_packet_size() helper

2014-10-13 Thread Andrzej Hajda
On 10/13/2014 12:16 PM, Thierry Reding wrote: > +int mipi_dsi_set_maximum_return_packet_size(struct mipi_dsi_device *dsi, > + u16 value) > +{ > + u8 tx[2] = { value & 0xff, value >> 8 }; > + struct mipi_dsi_msg msg; > + ssize_t err; > + > + me

[RFC PATCH 2/3] drm/ipvr: drm driver for vxd392

2014-10-13 Thread David Herrmann
Hi > +static struct drm_ioctl_desc ipvr_gem_ioctls[] = { > + DRM_IOCTL_DEF_DRV(IPVR_CONTEXT_CREATE, > + ipvr_context_create_ioctl, DRM_UNLOCKED), > + DRM_IOCTL_DEF_DRV(IPVR_CONTEXT_DESTROY, > + ipvr_context_destroy_ioctl, DRM_UNLOCKED), > +

'drop clk/voltage dependency filters for SI' breaks factory-over-clocked Cape Verde

2014-10-13 Thread Alex Deucher
On Wed, Oct 8, 2014 at 11:21 PM, Michel D?nzer wrote: > > Hi Alex, > > > your kernel commit 186b1b2ba2a0684e3d2d3703427a993a3b35b16d > ('drm/radeon/dpm: drop clk/voltage dependency filters for SI') causes my > factory-over-clocked Cape Verde card to lock up pretty quickly when running > e.g. Unigi

FirePro W600 problem

2014-10-13 Thread Alex Deucher
On Wed, Oct 8, 2014 at 4:41 PM, Andrey Germakovski wrote: > FirePro W600 does not work with more than 4 monitors, > > > > After 5th monitor attached X acting very slow. > > > > Or if I call drmModeSetCrtc function 5 times one time for each of the > monitors, it failing out I suspect you are runn

[Bug 85421] radeon stalled, GPU lockup, reset and failed on resume; crashed by firefox.

2014-10-13 Thread bugzilla-dae...@bugzilla.kernel.org
https://bugzilla.kernel.org/show_bug.cgi?id=85421 Alex Deucher changed: What|Removed |Added CC||alexdeucher at gmail.com --- Comment #3 fr

[PATCH] drm: drm_err: Remove unnecessary __func__ argument

2014-10-13 Thread David Herrmann
Hi On Sun, Oct 12, 2014 at 7:08 AM, Joe Perches wrote: > Removing the unnecessary drm_err __func__ argument by using > the equivalent %pf and __builtin_return_address(0) makes the > code smaller for every use of the DRM_ERROR macro. > > For instance: (allmodconfig) > > $ size drivers/gpu/drm/i915

[PATCH] drm: drm_err: Remove unnecessary __func__ argument

2014-10-13 Thread Joe Perches
On Mon, 2014-10-13 at 17:46 +0200, David Herrmann wrote: > Hi > > On Sun, Oct 12, 2014 at 7:08 AM, Joe Perches wrote: > > Removing the unnecessary drm_err __func__ argument by using > > the equivalent %pf and __builtin_return_address(0) makes the > > code smaller for every use of the DRM_ERROR ma

[Bug 85421] radeon stalled, GPU lockup, reset and failed on resume; crashed by firefox.

2014-10-13 Thread bugzilla-dae...@bugzilla.kernel.org
https://bugzilla.kernel.org/show_bug.cgi?id=85421 --- Comment #4 from Hin-Tak Leung --- (In reply to Alex Deucher from comment #3) > GPU lockups are usually caused by a problem with the command buffers > generated in the usermode acceleration drivers in mesa. I would suggest > trying a newer ver

[Bulk] Re: [3.16-rcX][pciehp][radeon] PCIe HotPlug conflicts with radeon GPU

2014-10-13 Thread Bjorn Helgaas
[+cc Alex, Christian, dri-devel] On Sat, Oct 11, 2014 at 1:37 PM, Shawn Starr wrote: > On September 11, 2014 04:26:21 PM Bjorn Helgaas wrote: >> [+cc linux-pci] >> >> On Sat, Aug 2, 2014 at 10:02 AM, Shawn Starr >> wrote: >> > Hello devs, >> > >> > There are two issues I am encountering with th

[Bug 85421] radeon stalled, GPU lockup, reset and failed on resume; crashed by firefox.

2014-10-13 Thread bugzilla-dae...@bugzilla.kernel.org
https://bugzilla.kernel.org/show_bug.cgi?id=85421 --- Comment #5 from Alex Deucher --- (In reply to Hin-Tak Leung from comment #4) > (In reply to Alex Deucher from comment #3) > > GPU lockups are usually caused by a problem with the command buffers > > generated in the usermode acceleration drive

[Bug 82889] [drm:si_dpm_set_power_state] *ERROR* si_disable_ulv failed

2014-10-13 Thread bugzilla-dae...@freedesktop.org
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[Bug 83731] dpm still not working on radeon TURKS 1002:6840

2014-10-13 Thread bugzilla-dae...@bugzilla.kernel.org
https://bugzilla.kernel.org/show_bug.cgi?id=83731 Alex Deucher changed: What|Removed |Added CC||alexdeucher at gmail.com --- Comment #2 fr

r600_dma_ring_test() failed - synchronization problem with write-combining memory

2014-10-13 Thread Alex Deucher
can just reserve a couple of slots in the wb > page. Does the attached patch work for you as well? Alex -- next part -- A non-text attachment was scrubbed... Name: 0001-drm-radeon-use-gart-memory-for-DMA-ring-tests.patch Type: text/x-patch Size: 4168 bytes Desc: not available URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20141013/d7927386/attachment.bin>

[PATCH] drm/ttm: Don't skip fpfn check if lpfn is 0 in ttm_bo_mem_compat

2014-10-13 Thread Alex Deucher
On Thu, Oct 9, 2014 at 5:56 AM, Christian K?nig wrote: > Am 09.10.2014 um 08:03 schrieb Michel D?nzer: >> >> From: Michel D?nzer >> >> Signed-off-by: Michel D?nzer > > > Reviewed-by: Christian K?nig > > Thomas, do you want to pull this through the ttm tree or can I take it through radeon? Al

[PATCH] drm/ttm: Don't evict BOs outside of the requested placement range

2014-10-13 Thread Alex Deucher
On Thu, Oct 9, 2014 at 2:02 AM, Michel D?nzer wrote: > From: Michel D?nzer > > The radeon driver uses placement range restrictions for several reasons, > in particular to make sure BOs in VRAM can be accessed by the CPU, e.g. > during a page fault. > > Without this change, TTM could evict other B

[PATCH v2 1/2] drm/radeon: Try placing NO_CPU_ACCESS BOs outside of CPU accessible VRAM

2014-10-13 Thread Alex Deucher
On Thu, Oct 9, 2014 at 11:28 PM, Michel D?nzer wrote: > From: Michel D?nzer > > This avoids them getting in the way of BOs which might be accessed by > the CPU. They can still go to the CPU accessible part of VRAM though if > there's no space outside of it. > > Signed-off-by: Michel D?nzer Appl

[PATCH 01/11] drm/radeon: rework vm_flush parameters

2014-10-13 Thread Alex Deucher
On Mon, Oct 13, 2014 at 6:41 AM, Christian K?nig wrote: > From: Christian K?nig > > Use ring structure instead of index and provide vm_id and pd_addr separately. > > Signed-off-by: Christian K?nig Series is: Reviewed-by: Alex Deucher And applied to my 3.19 tree. Alex > --- > drivers/gpu/drm

[Bug 84836] VERDE lockup with Unigine Valley/Heaven if ARB_sample_shading is enabled

2014-10-13 Thread bugzilla-dae...@freedesktop.org
>10 sec long freezes. -- You are receiving this mail because: You are the assignee for the bug. -- next part -- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20141013/ebe30985/attachment.html>

[PATCH] drm/nouveau/disp: Use NULL for pointers

2014-10-13 Thread Emil Velikov
On 13/10/14 12:47, Thierry Reding wrote: > On Mon, Jul 21, 2014 at 02:02:58PM +0200, Thierry Reding wrote: >> From: Thierry Reding >> >> The return type of exec_lookup() is struct nvkm_output *, so it should >> return NULL rather than 0. >> >> Signed-off-by: Thierry Reding >> --- >> drivers/gpu/

[Bug 86181] New: Timeout setting UVD clocks

2014-10-13 Thread bugzilla-dae...@bugzilla.kernel.org
https://bugzilla.kernel.org/show_bug.cgi?id=86181 Bug ID: 86181 Summary: Timeout setting UVD clocks Product: Drivers Version: 2.5 Kernel Version: 3.16.3-2 Hardware: All OS: Linux Tree: Mainline Sta

[Bug 86181] Timeout setting UVD clocks

2014-10-13 Thread bugzilla-dae...@bugzilla.kernel.org
https://bugzilla.kernel.org/show_bug.cgi?id=86181 --- Comment #1 from sterfield at gmail.com --- Created attachment 153561 --> https://bugzilla.kernel.org/attachment.cgi?id=153561&action=edit lspci of my graphic card lspci -vvv of my graphic card. -- You are receiving this mail because: You a

[Bug 85421] radeon stalled, GPU lockup, reset and failed on resume; crashed by firefox.

2014-10-13 Thread bugzilla-dae...@bugzilla.kernel.org
https://bugzilla.kernel.org/show_bug.cgi?id=85421 --- Comment #6 from Hin-Tak Leung --- (In reply to Alex Deucher from comment #5) > Just try a newer or older version and see if it helps. If so, try and > bisect to narrow down what change on the mesa side cuased the problem. Unfortunately it do

v3.17, i915 vs nouveau: possible recursive locking detected

2014-10-13 Thread Marcin Ślusarz
= [ INFO: possible recursive locking detected ] 3.17.0 #50 Not tainted - Xorg/1170 is trying to acquire lock: (&dev->struct_mutex){+.+.+.}, at: [] i915_gem_unmap_dma_buf+0x33/0xc0 [i915] but task is already h