Hi Boris & Dave,
I will update the rockchip drm driver soon, we have many change about it.
thanks.
On 2014?09?17? 13:41, Boris BREZILLON wrote:
> Hi Dave,
>
> On Wed, 17 Sep 2014 11:18:44 +1000
> Dave Airlie wrote:
>
>> Hey,
>>
>> So I notice we have two unreviewed drivers outstanding, the atmel
On 09/17/2014 04:06 AM, Dave Airlie wrote:
> On 17 September 2014 06:40, Jyri Sarha wrote:
>> Changes since v2:
>> - Change compatible property from "ti,gpio-clock" to "ti,gpio-gate-clock"
>> - Some minor cleanups
>>
>> The code has a functional dependency to:
>> http://www.mail-archive.com/linux-
radeon/radeon_bios.c: clean up coding style differences in radeon_get_bios()
Signed-off-by: Wilfried Klaebe
diff --git a/drivers/gpu/drm/radeon/radeon_bios.c
b/drivers/gpu/drm/radeon/radeon_bios.c
index 6a03624..63ccb8f 100644
--- a/drivers/gpu/drm/radeon/radeon_bios.c
+++ b/drivers/gpu/drm/rad
ith simple phandle. Can you
guarantee that it's enough for everyone, on all platforms?
The point of the ports/endpoint graph is to also support more
complicated scenarios. If you now create ps8622 bindings that do not
support those graphs, the no one else using ps8622 can use
ports/endpoint graphs either.
Btw, is there an example how the bridge with these bindings is used in a
board's .dts file? I couldn't find any example with a quick search. So
it's unclear to me what the "simple phandle" actually is.
Tomi
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t; >
> >> >
> >> > It sounds like there's a problem with interrupt processing on your
> >> system. Please provide the dmesg output. You might try
> >> disabling/enabling MSI to see if that works around the problem.
> >>
> >> Thank you so much for this hint! Booting using radeon.msi=0 finally
> >> brings the system into a usable state. The dmesg of a default boot (i.e.
> >> radeon.msi=-1) is available at http://pastebin.com/gS1xHYPc
> >
> >
> > Can you file a bug report at
> > https://bugs.freedesktop.org/enter_bug.cgi?product=DRI component
> > "DRM/Radeon" and attach the dmesg output there?
> >
>
> Also mention what chipset your system uses and whether the card is AGP or
> not.
>
> Alex
>
>
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> What if someone doesn't know about that intention one day and inserts
> some field in the structure at the "wrong place" ?
Then we have code review. Also they are much more likely to simply change
the code elsewhere and break it. Nobody afaik ever got this wrong, while
the litany of other broken
difficult
to improve the display driver model later if we're missing such critical
pieces from the DT bindings.
Tomi
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On Tuesday 16 September 2014 10:32 AM, Vivek Gautam wrote:
> Currently the DP_PHY_ENABLE register is mapped in the driver,
> and accessed to control power to the PHY.
> With mfd-syscon and regmap interface available at our disposal,
> it's wise to use that instead of using a 'reg' property for th
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