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Am 13.06.2014 23:31, schrieb Alex Deucher:
> On Fri, Jun 13, 2014 at 11:45 AM, Christian K?nig
> wrote:
>> Hi Marek,
>>
>> ah, yes! Piglit in combination with that patch can indeed crash the box.
>>
>> Going to investigate now that I can reproduce it.
> I wonder if it's a clockgating issue with th
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of the system is i386"
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ase note that I'm experiencing this bug on Linux Mint 17 Cinnamon Edition
with the Intel 82852/855GM chipset.
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river specific to dce-8, or your tv
misrepresenting its capabilities.
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e bug.
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>
> I'm guessing this is unrelated though
Yep, unrelated. This is another new bug introduced into kms-pageflip handling
for 3.16. I'll look into this tomorrow, as i have suitable test hardware.
-mario
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Use the zeroing function instead of dma_alloc_coherent & memset(,0,)
Signed-off-by: Joe Perches
---
drivers/gpu/drm/drm_pci.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/drm_pci.c b/drivers/gpu/drm/drm_pci.c
index 020cfd9..6b3ca60 100644
--- a/driver
Use the zeroing function instead of dma_alloc_coherent & memset(,0,)
Joe Perches (26):
powerpc: Use dma_zalloc_coherent
sh: Use dma_zalloc_coherent
ata: Use dma_zalloc_coherent
block: Use dma_zalloc_coherent
crypto: Use dma_zalloc_coherent
dma: Use dma_zalloc_coherent
gpu: Use dma_za
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On 06/09/2014 06:04 PM, Boris BREZILLON wrote:
> The HLCDC IP available in some Atmel SoCs (i.e. sam9x5i.e. at91sam9n12,
> at91sam9x5 family or sama5d3 family) provide a PWM device.
>
> This driver add support for this PWM device.
>
> Signed-off-by: Boris BREZILLON
> ---
> .../devicetree/bind
On 06/09/2014 06:04 PM, Boris BREZILLON wrote:
> The Atmel HLCDC (High LCD Controller) IP available on some Atmel SoCs (i.e.
> at91sam9n12, at91sam9x5 family or sama5d3 family) provides a display
> controller device.
>
> This display controller support at least one primary plane and might
> prov
Hello JJ,
On 15/06/2014 11:11, Jean-Jacques Hiblot wrote:
>
> On 06/09/2014 06:04 PM, Boris BREZILLON wrote:
>> The HLCDC IP available in some Atmel SoCs (i.e. sam9x5i.e. at91sam9n12,
>> at91sam9x5 family or sama5d3 family) provide a PWM device.
>>
>> This driver add support for this PWM device.
>
Hello JJ,
On 15/06/2014 11:32, Jean-Jacques Hiblot wrote:
>
> On 06/09/2014 06:04 PM, Boris BREZILLON wrote:
>> The Atmel HLCDC (High LCD Controller) IP available on some Atmel SoCs (i.e.
>> at91sam9n12, at91sam9x5 family or sama5d3 family) provides a display
>> controller device.
>>
>> This displ
Fix a sparse warning: ttm_bo_reserve()'s last argument is a
pointer to a struct, so use NULL as nullpointer.
Signed-off-by: Martin Kepplinger
---
this applies to next-20140613. Please ignore if annoyingly irrelevant.
drivers/gpu/drm/ttm/ttm_bo.c | 14 +++---
1 file changed, 7 insertio
On 06/09/2014 06:04 PM, Boris BREZILLON wrote:
> The HLCDC IP available on some Atmel SoCs (i.e. at91sam9n12, at91sam9x5
> family or sama5d3 family) exposes 2 subdevices:
> - a display controller (controlled by a DRM driver)
> - a PWM chip
>
> Add support for the MFD device which will just retriev
Hello JJ,
On 15/06/2014 10:53, Jean-Jacques Hiblot wrote:
> On 06/09/2014 06:04 PM, Boris BREZILLON wrote:
>> The HLCDC IP available on some Atmel SoCs (i.e. at91sam9n12, at91sam9x5
>> family or sama5d3 family) exposes 2 subdevices:
>> - a display controller (controlled by a DRM driver)
>> - a PWM
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