On Sat, May 17, 2014 at 12:38 AM, Matt Roper
wrote:
> + if (ret) {
> + if (req->flags & DRM_MODE_CURSOR_BO)
> + drm_mode_rmfb(dev, &fb->base.id, file_priv);
> + return ret;
> + }
With the new refcount logic an unconditional
drm_frameb
On 17 May 2014 00:00, Alex Deucher wrote:
> On Fri, May 16, 2014 at 5:10 AM, Rafa? Mi?ecki wrote:
>> +#define DCE3_HDMI0_AUDIO_CRC_CONTROL 0x74dc
>
> They aren't swapped in hw, the register defines were just accidentally
> swapped in the header (probably a copy paste typo). Just swap the
> def
On 17 May 2014 01:34, Rafa? Mi?ecki wrote:
> On 17 May 2014 00:00, Alex Deucher wrote:
>> On Fri, May 16, 2014 at 5:10 AM, Rafa? Mi?ecki wrote:
>>> +#define DCE3_HDMI0_AUDIO_CRC_CONTROL 0x74dc
>>
>> They aren't swapped in hw, the register defines were just accidentally
>> swapped in the header
On 17 May 2014 02:14, Rafa? Mi?ecki wrote:
> So it's the fact:
> DCE2 uses 0x74dc
> DCE2 uses 0x740c
I meant:
DCE2 uses 0x74dc
DCE3 uses 0x740c
ause:
You are the assignee for the bug.
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_object(priv);
> if (ret)
> return ret;
> diff --git a/nvkm/subdev/clock/nve0.c b/nvkm/subdev/clock/nve0.c
> index d3c37c9..860aa73 100644
> --- a/nvkm/subdev/clock/nve0.c
> +++ b/nvkm/subdev/clock/nve0.c
> @@ -473,7 +473,8 @@ nve0_clock_ctor(struct nouveau_object *parent, struct
nouveau_object *engine,
> struct nve0_clock_priv *priv;
> int ret;
>
> - ret = nouveau_clock_create(parent, engine, oclass, nve0_domain,
&priv);
> + ret = nouveau_clock_create(parent, engine, oclass, nve0_domain,
false,
> + &priv);
> *pobject = nv_object(priv);
> if (ret)
> return ret;
> --
> 1.8.5.5
>
> ___
> Nouveau mailing list
> Nouveau at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/nouveau
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in with the "maybe" there too.
>
> I have no idea what NvMemExec _really_ is doing, so I left it alone. I
> assume that the majority of what my patch enables is actually engine
> reclocking, not memory reclocking. So to get both, people would have
> to flip both flags? Or is there more to it?
I use it during development to allow independent testing or engine clock
code without the more faulty memory code causing problems. The option
prevents the memory recording scripts from being executed.
Ben.
>
> -ilia
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On Fri, May 16, 2014 at 11:54 PM, Ben Skeggs wrote:
> On 17 May 2014 13:39, "Ilia Mirkin" wrote:
>>
>> On Fri, May 16, 2014 at 11:17 PM, Ben Skeggs wrote:
>> > On 17 May 2014 02:43, "Ilia Mirkin" wrote:
>> >>
>> >> Adds a NvReclock boolean option to allow the user to enable (or
>> >> disable)
>
On Sat, May 17, 2014 at 2:06 PM, Ilia Mirkin wrote:
> On Fri, May 16, 2014 at 11:54 PM, Ben Skeggs wrote:
>> On 17 May 2014 13:39, "Ilia Mirkin" wrote:
>>>
>>> On Fri, May 16, 2014 at 11:17 PM, Ben Skeggs wrote:
>>> > On 17 May 2014 02:43, "Ilia Mirkin" wrote:
>>> >>
>>> >> Adds a NvReclock bo
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assignee for the bug.
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tra".
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this is problem only with some formats used, i think i will
checkeout this :).
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it enabled :). Does that format
need to be supported anymore?
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receiving this mail because:
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so.0
#6 0x0039478f4ded in clone () from /lib64/libc.so.6
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ed up.
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receiving this mail because:
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, unsolvable by this :(.
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-rt, clang and clang-tools-extra: https://github.com/darkbasic
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On Fri, May 16, 2014 at 8:15 PM, Rafa? Mi?ecki wrote:
> On 17 May 2014 02:14, Rafa? Mi?ecki wrote:
>> So it's the fact:
>> DCE2 uses 0x74dc
>> DCE2 uses 0x740c
>
> I meant:
> DCE2 uses 0x74dc
> DCE3 uses 0x740c
Yeah, I just double checked DCE2 and you are correct. So the patch is
fine as is.
A
e the assignee for the bug.
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ot;Morphological
> AA" to "Ultra".
Have you tested with the patch attached to this bug?
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ith R600_DEBUG=ps,vs,gs and post
the output?
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are the assignee for the bug.
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https://bugzilla.kernel.org/show_bug.cgi?id=76321
--- Comment #4 from Pali Roh?r ---
With v2 patch now sensors does not report any error (when card is turned off):
$ sensors
radeon-pci-0100
Adapter: PCI adapter
temp1:N/A (crit = +120.0?C, hyst = +90.0?C)
This looks ok.
And for pow
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The DDC bus uses this for it's supply, enable it so EDID can be read.
This eliminates I2C read timeouts on Venice2 and EDID can be verified
with i2cdump.
Signed-off-by: Dylan Reid
---
drivers/gpu/drm/tegra/hdmi.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/gpu/dr
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The HDMI driver that handles Tegra114 can handle Tegra124 as well,
mark Tegra124 as compatible. This makes HDMI output work on Venice2.
Signed-off-by: Dylan Reid
---
arch/arm/boot/dts/tegra124.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/tegra124.
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nless new regressions are introduced that
would be a good candidate to test.
Thierry
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problem?
I don't want to get stuck on kernel 3.12.20 :(
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mail because:
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u are receiving this mail because:
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ernel 8d0a2215931f1ffd77aef65cae2c0becc3f5d560 with radeon.dpm=0 and
radeon.runpm=0.
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the hard work.
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On Sat, May 17, 2014 at 2:33 PM, Thierry Reding
wrote:
> On Sat, May 17, 2014 at 11:21:20AM -0700, Dylan Reid wrote:
>> The HDMI driver that handles Tegra114 can handle Tegra124 as well,
>> mark Tegra124 as compatible. This makes HDMI output work on Venice2.
>>
>> Signed-off-by: Dylan Reid
>> --
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