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on but everything was black.
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worked after this xrandr cycle.
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,ffodivxvdpau,
PlanetEarthBirds.mkv
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https://bugzilla.kernel.org/show_bug.cgi?id=67571
Eric Valette changed:
What|Removed |Added
Summary|BUG: unable to handle |BUG: amd E350 GPU hangs
https://bugzilla.kernel.org/show_bug.cgi?id=68571
--- Comment #18 from perry3d at gmail.com ---
You are right, its not PCIExpress 2.0 vs. 3.0. I forced it in the bios, no
improvment.
I also tried the drm-next-3.14 branch from Alex repository. Made it even worse:
freeze on boot. Before i reached k
https://bugzilla.kernel.org/show_bug.cgi?id=68571
--- Comment #19 from perry3d at gmail.com ---
Created attachment 124071
--> https://bugzilla.kernel.org/attachment.cgi?id=124071&action=edit
dmesg from drm-next 3.14 with patch
This is the dmesg log file after getting a GPU freeze. The kernel is
https://bugzilla.kernel.org/show_bug.cgi?id=68571
--- Comment #20 from perry3d at gmail.com ---
Created attachment 124081
--> https://bugzilla.kernel.org/attachment.cgi?id=124081&action=edit
The vbios from the MSI R6870 Hawk
Downloaded the vbios as described in
https://bugs.freedesktop.org/show
https://bugzilla.kernel.org/show_bug.cgi?id=68571
--- Comment #21 from Alexandre Demers ---
(In reply to perry3d from comment #18)
> You are right, its not PCIExpress 2.0 vs. 3.0. I forced it in the bios, no
> improvment.
>
> I also tried the drm-next-3.14 branch from Alex repository. Made it ev
https://bugzilla.kernel.org/show_bug.cgi?id=68571
--- Comment #22 from perry3d at gmail.com ---
That's no problem, as long as they are stable :).
But i think you are wrong: in the dmesg output the card is set to 930 Mhz (if i
read it correctly). And the stock 6870 uses 900Mhz. Maybe the voltage is
https://bugzilla.kernel.org/show_bug.cgi?id=68571
--- Comment #23 from Alexandre Demers ---
(In reply to perry3d from comment #22)
> That's no problem, as long as they are stable :).
> But i think you are wrong: in the dmesg output the card is set to 930 Mhz
> (if i read it correctly). And the st
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The TDA998x HDMI transmitter accepts audio input from either I2S or
S/PDIF.
Theses inputs have different intrinsic constraints and these constraints
may be modified by the audio parameters of the connected video device.
The choice of I2S or S/PDIF may be the done by the user or by automatic
proces
This patch adds the DT documentation of the NXP TDA998x CODEC.
Signed-off-by: Jean-Francois Moine
---
Documentation/devicetree/bindings/drm/i2c/tda998x.txt | 17 +
1 file changed, 17 insertions(+)
diff --git a/Documentation/devicetree/bindings/drm/i2c/tda998x.txt
b/Documentatio
.
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al though,
because the functionality is already implemented.
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https://bugzilla.kernel.org/show_bug.cgi?id=68571
--- Comment #24 from Alex Deucher ---
For reference the patch is here:
http://lists.freedesktop.org/archives/dri-devel/2014-January/052947.html
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https://bugzilla.kernel.org/show_bug.cgi?id=60523
Alex Belykh changed:
What|Removed |Added
CC||albel727 at ngs.ru
--- Comment #46 from Ale
https://bugzilla.kernel.org/show_bug.cgi?id=60523
--- Comment #47 from Alex Belykh ---
Created attachment 124111
--> https://bugzilla.kernel.org/attachment.cgi?id=124111&action=edit
dmesg when booting with two monitors
The lockups at 3.8 sec and 19.3 sec are observable. Also I wonder why it
in
https://bugzilla.kernel.org/show_bug.cgi?id=60523
--- Comment #48 from Alex Belykh ---
Created attachment 124121
--> https://bugzilla.kernel.org/attachment.cgi?id=124121&action=edit
dmesg when booting up with a single monitor
attaching a second monitor at 241.8 sec.
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Am Samstag, den 01.02.2014, 12:16 +0900 schrieb Alexandre Courbot:
> Add a clumsy-but-working FB support for GK20A. This chip only uses system
> memory, so we allocate a big chunk using CMA and let the existing memory
> managers work on it.
>
> A better future design would be to allocate objects d
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On Sat, Feb 1, 2014 at 8:40 AM, Lucas Stach wrote:
> Am Samstag, den 01.02.2014, 12:16 +0900 schrieb Alexandre Courbot:
>> Add a clumsy-but-working FB support for GK20A. This chip only uses system
>> memory, so we allocate a big chunk using CMA and let the existing memory
>> managers work on it.
>
Hello.
On 01-02-2014 20:48, Jean-Francois Moine wrote:
> This patch adds the DT documentation of the NXP TDA998x CODEC.
> Signed-off-by: Jean-Francois Moine
> ---
> Documentation/devicetree/bindings/drm/i2c/tda998x.txt | 17 +
> 1 file changed, 17 insertions(+)
> diff --git
K?nig ---
Ok, thanks allot. Looks like we can close it.
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https://bugzilla.kernel.org/show_bug.cgi?id=65761
--- Comment #29 from Christoph Haag ---
No, it does not seem to help.
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wn now and the display
is definitively different.
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Remove PCI-dependent code so the FIFO engine can also handle platform
devices.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/drm/nouveau/core/engine/fifo/base.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/nouveau/core/engine/fifo/base.c
b/drivers/gpu/d
pm_runtime_get*() may return -EACCESS to indicate a device does not have
runtime PM enabled. This is the case when the nouveau.runpm parameter is
set to 0, and is not an error in that context. Handle this case without
failure.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/drm/nouveau/dispnv04
Memory was always allocated for 4096 channels. Change this to allocate
what we actually need according to the number of channels we use.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/dr
Hello everyone,
GK20A is the Kepler-based GPU used in the upcoming Tegra K1 chips. The following
patches perform architectural changes to Nouveau that are necessary to support
non-PCI GPUs and add initial support for GK20A. Although the support is still
very basic and more user-space changes will
Some chips that use system memory exclusively (e.g. GK20A) do not
expose 2 BAR regions. For them only BAR1 exists, and it should be used
for USERD mapping. Do not map BAR3 if its resource does not exist.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/drm/nouveau/core/subdev/bar/base.c | 7
Add a clumsy-but-working FB support for GK20A. This chip only uses system
memory, so we allocate a big chunk using CMA and let the existing memory
managers work on it.
A better future design would be to allocate objects directly from system
memory without having to suffer from the limitations of a
Use abstracted resource query functions to allow FB core to handle
both PCI and platform devices.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/drm/nouveau/core/subdev/fb/nvc0.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb
Add a nouveau_drm_platform_probe() function that probes a Nouveau
platform device and registers it using drm_platform_init().
Signed-off-by: Alexandre Courbot
---
drivers/gpu/drm/nouveau/core/engine/device/base.c | 34 ++
.../gpu/drm/nouveau/core/include/engine/device.h |
GK20A's FIFO is compatible with NVE0, but only features 128 channels and
1 runlist.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/drm/nouveau/Makefile | 1 +
drivers/gpu/drm/nouveau/core/engine/fifo/nve0.h| 1 +
drivers/gpu/drm/nouveau/core/engine/fifo/nvea.c| 27 +
Set the correct subdev/engine classes when GK20A (0xea) is probed.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/drm/nouveau/core/engine/device/nve0.c | 20
1 file changed, 20 insertions(+)
diff --git a/drivers/gpu/drm/nouveau/core/engine/device/nve0.c
b/drivers/gpu/drm
Adapt the NVC0 BAR driver to make it able to support chips that do not
expose a BAR3. When this happens, BAR1 is then used for USERD mapping
and the BAR alloc() functions is disabled, making GPU objects unable
to rely on BAR for data access and falling back to PRAMIN.
Signed-off-by: Alexandre Cour
Use abstracted resource query functions, and obtain the IRQ from the
correct bus.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/drm/nouveau/core/include/subdev/mc.h | 1 +
drivers/gpu/drm/nouveau/core/subdev/mc/base.c| 43 +++-
2 files changed, 29 insertions(+), 15 de
GK20A does not embed a dedicated COPY engine and thus cannot allocate
the copy channel that nouveau_accel_init() attempts to create. It also
lacks any display hardware, so the creation of a software channel does
not apply neither.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/drm/nouveau/nouv
Remove PCI-dependent code so the BAR core can also handle platform
devices.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/drm/nouveau/core/subdev/bar/base.c | 4 ++--
drivers/gpu/drm/nouveau/core/subdev/bar/nv50.c | 4 ++--
drivers/gpu/drm/nouveau/core/subdev/bar/nvc0.c | 15 +++
GK20A's timer is directly attached to the system timer and cannot be
calibrated. Skip the calibration phase on that chip since the
corresponding registers do not exist.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/drm/nouveau/core/subdev/timer/nv04.c | 19 +--
1 file changed,
Add support for initializing the priv ring of GK20A. This is done by the
BIOS on desktop GPUs, but needs to be done by hand on Tegra.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/drm/nouveau/Makefile | 1 +
drivers/gpu/drm/nouveau/core/include/subdev/ibus.h | 1 +
drive
The T124 generation of Tegra GPUs uses the Kepler architecture and can
thus be driven by Nouveau. However, they are declared as platform
devices using the Device Tree, and Nouveau has a very strong dependency
on PCI. This patch makes Nouveau core able to handle platform devices as
well as PCI devic
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