From: Alex Deucher
Needed to properly handle dynamic state adjustment.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/btc_dpm.c | 30 +++---
drivers/gpu/drm/radeon/btc_dpm.h |3 ++-
drivers/gpu/drm/radeon/ni_dpm.c |3 ++-
3 files changed, 19 insertion
From: Alex Deucher
Needed to properly handle dynamic state adjustment.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/ni_dpm.c | 69 --
1 files changed, 36 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/radeon/ni_dpm.c b/drivers/gpu/d
From: Alex Deucher
Needed to properly handle dynamic state adjustment.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/sumo_dpm.c | 143 +
1 files changed, 81 insertions(+), 62 deletions(-)
diff --git a/drivers/gpu/drm/radeon/sumo_dpm.c
b/drivers/g
From: Alex Deucher
Needed to properly handle dynamic state adjustment.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/trinity_dpm.c | 93 +++---
1 files changed, 52 insertions(+), 41 deletions(-)
diff --git a/drivers/gpu/drm/radeon/trinity_dpm.c
b/driver
From: Alex Deucher
For r6xx-evergreen, they are no-ops as they don't support
any dynamic state adjustment.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/r600_dpm.c| 10 ++
drivers/gpu/drm/radeon/radeon_asic.c |8
drivers/gpu/drm/radeon/radeon_asic.h |2 +
From: Alex Deucher
Needed to properly handle dynamic state adjustment.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/radeon.h|4
drivers/gpu/drm/radeon/radeon_pm.c | 11 +++
2 files changed, 15 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/radeon/r
From: Alex Deucher
This properly implemented dynamic state adjustment by
using a working copy of the requested and current
power states.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/radeon_asic.c |2 +
drivers/gpu/drm/radeon/radeon_asic.h |2 +
drivers/gpu/drm/radeon/trinity_
From: Alex Deucher
This properly implemented dynamic state adjustment by
using a working copy of the requested and current
power states.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/radeon_asic.c |2 +
drivers/gpu/drm/radeon/radeon_asic.h |2 +
drivers/gpu/drm/radeon/sumo_dpm
From: Alex Deucher
This properly implemented dynamic state adjustment by
using a working copy of the requested and current
power states.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/ni_dpm.c | 65 --
drivers/gpu/drm/radeon/ni_dpm.h |3 +
From: Alex Deucher
This properly implemented dynamic state adjustment by
using a working copy of the requested and current
power states.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/btc_dpm.c | 81 +
drivers/gpu/drm/radeon/cypress_dpm.h |5 ++
From: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/ni_dpm.c |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/radeon/ni_dpm.c b/drivers/gpu/drm/radeon/ni_dpm.c
index 01ecb80..a88f0cb 100644
--- a/drivers/gpu/drm/radeon/ni_dpm.c
+++
From: Alex Deucher
Use the new asic callback instead.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/sumo_dpm.c| 19 +++
drivers/gpu/drm/radeon/sumo_dpm.h|1 -
drivers/gpu/drm/radeon/sumo_smc.c|2 +-
drivers/gpu/drm/radeon/trinity_dpm.c |6 +++-
From: Alex Deucher
Now that the proper fix has been implemented I can
remove the last remnants of the initial implementation.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/radeon.h|1 -
drivers/gpu/drm/radeon/radeon_pm.c | 24 +---
2 files changed, 5 inse
> >>Dave.
> >
> > Hey Dave
> > Of course I will investigate.
> >
> > The SWIOTLB is unfortunately used because it is a fallback (and I am the
> > maintainer of it) and if a real IOMMU is activated it can be mitigated
> > differently. When you say 'passed through' you mean in terms of an IOMMU
>
Am 26.06.2013 15:21, schrieb alexdeuc...@gmail.com:
From: Alex Deucher
v2: update to latest driver changes
v3: properly tear down vm on suspend
v4: fix up irq init ordering
Signed-off-by: Alex Deucher
Just a copy&paste error, but some comments are referring to cayman and
r500/r700 generati
On Wed, Jun 26, 2013 at 09:22:12AM -0400, alexdeuc...@gmail.com wrote:
> From: Alex Deucher
>
> On CIK, the compute rings work slightly differently than
> on previous asics, however the basic concepts are the same.
>
> The main differences:
> - New MEC engines for compute queues
> - Multiple que
On Wed, Jun 26, 2013 at 09:22:13AM -0400, alexdeuc...@gmail.com wrote:
> From: Alex Deucher
>
> Type 2 packets are deprecated on CIK MEC and we should use
> type 3 nop packets. Setting the count field to the max value
> (0x3fff) indicates that only one dword should be skipped
> like a type 2 pac
Am 26.06.2013 15:22, schrieb alexdeuc...@gmail.com:
From: Alex Deucher
Add callbacks to the radeon_ring struct to handle
rptr/wptr fetchs and wptr updates.
We currently use one version for all rings, but this
allows us to override with a ring specific versions.
Needed for compute rings on CIK.
On Wed, Jun 26, 2013 at 09:22:29AM -0400, alexdeuc...@gmail.com wrote:
> From: Alex Deucher
>
> This adds the common dpm (dynamic power management)
> infrastructure:
> - dpm callbacks
> - dpm init/fini/suspend/resume
> - dpm power state selection
>
> No device specific code is enabled yet.
>
>
On Wed, Jun 26, 2013 at 09:22:35AM -0400, alexdeuc...@gmail.com wrote:
> From: Alex Deucher
>
> This adds dpm support for rs780/rs880 asics. This includes:
> - clockgating
> - dynamic engine clock scaling
> - dynamic voltage scaling
>
> set radeon.dpm=1 to enable it.
>
> Signed-off-by: Alex De
On Fri, Jun 21, 2013 at 2:52 PM, Darren Etheridge wrote:
> The series of patches that follow are intended to address issues that
> have been found in the tilcdc drm driver. The patchset enables support
> for screen resolutions with horizontal resolutions greater than 1024
> pixels. The patchset a
2013/6/25 Jerome Glisse :
> On Tue, Jun 25, 2013 at 10:17 AM, Inki Dae wrote:
>> 2013/6/25 Rob Clark :
>>> On Tue, Jun 25, 2013 at 5:09 AM, Inki Dae wrote:
> that
> should be the role of kernel memory management which of course needs
> synchronization btw A and B. But in no case this
On Sat, 22 Jun 2013 13:04:09 -0700
Guenter Roeck wrote:
> On Sat, Jun 22, 2013 at 12:16:46PM -0700, Jesse Barnes wrote:
> > On Fri, 21 Jun 2013 23:58:08 -0700
> > Guenter Roeck wrote:
> >
> > > Hi all,
> > >
> > > after upgrading one of my servers to 3.8, then 3.9.7 and 3.10-rc6, I
> > > star
On Wed, Jun 26, 2013 at 01:30:01PM +0200, Petter Reinholdtsen wrote:
> [Daniel Vetter]
> > Nah, silence just means that your patch fell through the crack while I've
> > travelled around a bit. Thanks for poking, it's merged now for 3.11 (with
> > cc: stable) to my drm-intel-next-queued branch. I've
Rob Clark wrote on Wed [2013-Jun-26 11:42:44 -0400]:
> On Fri, Jun 21, 2013 at 2:52 PM, Darren Etheridge wrote:
> > The series of patches that follow are intended to address issues that
> > have been found in the tilcdc drm driver. The patchset enables support
> > for screen resolutions with hori
On Wed, Jun 26, 2013 at 09:21:20AM -0400, alexdeuc...@gmail.com wrote:
> From: Alex Deucher
>
> These are the radeon patches for 3.11. Some of these patches
> are huge so, it might be easier to review things here:
> http://cgit.freedesktop.org/~agd5f/linux/log/?h=drm-next-3.11-wip
>
> I'll send
On Wed, Jun 26, 2013 at 09:22:11AM -0400, alexdeuc...@gmail.com wrote:
> From: Alex Deucher
>
> The doorbell aperture is a PCI BAR whose pages can be
> mapped to compute resources for things like wptrs
> for userspace queues.
>
> This patch maps the BAR and sets up a simple allocator
> to alloca
I am resubmitting this patch because I ran into a build error when trying to
build it on a 32-bit system. I had to fix how the 64-bit division was done in
mga_vga_calculate_mode_bandwidth. I used the do_div macro instead of doing the
straight division.
Julia Lemire (1):
drm/mgag200: Added r
At the larger resolutions, the g200e series sometimes struggles with
maintaining a proper output. Problems like flickering or black bands appearing
on screen can occur. In order to avoid this, limitations regarding resolutions
and bandwidth have been added for the different variations of the g200
On Wed, Jun 26, 2013 at 8:57 AM, Jerome Glisse wrote:
> On Wed, Jun 26, 2013 at 09:22:11AM -0400, alexdeuc...@gmail.com wrote:
>> From: Alex Deucher
>>
>> The doorbell aperture is a PCI BAR whose pages can be
>> mapped to compute resources for things like wptrs
>> for userspace queues.
>>
>> This
CC drivers/video/console/vgacon.o
drivers/video/console/vgacon.c: In function ‘vgacon_do_font_op’:
drivers/video/console/vgacon.c:1129:5: error: implicit declaration of
function ‘cond_resched’ [-Werror=implicit-function-declaration]
cc1: some warnings being treated as errors
make[3]: ***
> -Original Message-
> From: Joshua C. [mailto:joshua...@gmail.com]
> Sent: Wednesday, June 26, 2013 1:52 PM
> To: dri-devel@lists.freedesktop.org
> Cc: Deucher, Alexander
> Subject: RADEON / DPM: GPU cannot properly up-clock
>
> First of all thank you guys for pushing this out! Great wo
On 06/24/2013 04:27 PM, David Herrmann wrote:
> If we create proper platform-devices in x86 boot-code, we can use simplefb
> for VBE or EFI framebuffers, too. However, there is normally no OF support
> so we introduce a platform_data object so x86 boot-code can pass the
> paramaters via plain old p
On 06/24/2013 04:27 PM, David Herrmann wrote:
> The current situation regarding boot-framebuffers (VGA, VESA/VBE, EFI) on
> x86 causes troubles when loading multiple fbdev drivers. The global
> "struct screen_info" does not provide any state-tracking about which
> drivers use the FBs. request_mem_r
On 06/24/2013 04:27 PM, David Herrmann wrote:
> The SimpleDRM driver binds to simple-framebuffer devices and provides a
> DRM/KMS API. It provides only a single CRTC+encoder+connector combination
> plus one initial mode.
>
> Userspace can create one dumb-buffer and attach it to the CRTC. Only if
>
On 06/24/2013 04:27 PM, David Herrmann wrote:
> Create a simple fbdev device during SimpleDRM setup so legacy user-space
> and fbcon can use it.
>
> fbdev deletion is quite buggy. A unregister_framebuffer() call followed by
> a printk() causes NULL-derefs in hide_cursor() and other places in the V
On 06/24/2013 04:27 PM, David Herrmann wrote:
> Hi
>
> This is my second revision of the dvbe driver. I renamed it to SimpleDRM to
> show the resemblence with the recently introduced simplefb.c fbdev driver. The
> driver is supposed to be the most basic DRM driver similar to efifb.c,
> vesafb.c,
https://bugs.freedesktop.org/show_bug.cgi?id=63935
--- Comment #54 from Grigori Goronzy ---
I am also seeing this with a PALM ASIC in the drm-next-3.11-wip branch. The
machine is a Lenovo x121e.
--
You are receiving this mail because:
You are the assignee for the bug.
__
From: Shobhit Kumar
SDP header and SDP VSC header as per eDP 1.3 spec, section 3.5,
chapter "PSR Secondary Data Package Support".
v2: Modified and corrected the structures to be more in line for
kernel coding guidelines and rebased the code on Paulo's DP patchset
v3: removing unecessary identati
From: Shobhit Kumar
SDP header and SDP VSC header as per eDP 1.3 spec, section 3.5,
chapter "PSR Secondary Data Package Support".
v2: Modified and corrected the structures to be more in line for
kernel coding guidelines and rebased the code on Paulo's DP patchset
v3: removing unecessary identati
From: Shobhit Kumar
v2: reuse of just created is_edp_psr and put it at right place.
v3: move is_edp_psr above intel_edp_disable
Reviewed-by: Paulo Zanoni
Reviewed-by: Jani Nikula
Signed-off-by: Shobhit Kumar
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/intel_dp.c | 13 +
Prep patch for reuse aux_clock_divider with EDP_PSR_AUX_CTL setup.
Reviewed-by: Paulo Zanoni
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/intel_dp.c | 58 +++--
1 file changed, 33 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel
Adding Enable and Disable PSR functionalities. This includes setting the
PSR configuration over AUX, sending SDP VSC DIP over the eDP PIPE config,
enabling PSR in the sink via DPCD register and finally enabling PSR on
the host.
This patch is based on initial PSR code by Sateesh Kavuri and Kumar Sh
Adding support for PSR Status, PSR entry counter and performance counters.
Heavily based on initial work from Shobhit.
v2: Fix PSR Status Link bits by Paulo Zanoni.
CC: Paulo Zanoni
Credits-by: Shobhit Kumar
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/i915_debugfs.c | 90
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/i915_debugfs.c | 39 ++---
drivers/gpu/drm/i915/i915_drv.h | 12 +++
drivers/gpu/drm/i915/intel_dp.c | 68 -
3 files changed, 114 insertions(+), 5 deletions(-)
diff --git a/driver
Required function to disable PSR when going to console mode.
But also can be used whenever PSR mode entry conditions changed.
v2: Add it before PSR Hook. Update function not really been called yet.
---
drivers/gpu/drm/i915/intel_dp.c | 37 ++---
drivers/gpu/drm/i9
PSR is enabled by default but can be disabled.
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/i915_debugfs.c | 3 +++
drivers/gpu/drm/i915/i915_drv.c | 4
drivers/gpu/drm/i915/i915_drv.h | 2 ++
drivers/gpu/drm/i915/intel_dp.c | 6 ++
4 files changed, 15 insertions(+)
This global value allows userspace know when PSR is enabled and active,
i.e. in SRD entry state.
This will allow userspace emit more busy_ioctl when doing directly copy_area
operations through scanout allowing forced psr exit.
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/i915_dma.c | 3 +
PSR tracking engine in HSW doesn't detect automagically some directly copy area
operations through scanout so we will have to kick it manually and
reschedule it to come back to normal operation as soon as possible.
v2: Before PSR Hook. Don't force it when busy yet.
Signed-off-by: Rodrigo Vivi
--
PSR must be enabled after transcoder and port are running.
And it is only available for HSW.
v2: move enable/disable to intel_ddi
v3: The spec suggests PSR should be disabled even before backlight (by pzanoni)
v4: also disabling and enabling whenever panel is disabled/enabled.
v5: make it last pat
On Wed, Jun 26, 2013 at 06:55:20PM -0300, Rodrigo Vivi wrote:
> This global value allows userspace know when PSR is enabled and active,
> i.e. in SRD entry state.
> This will allow userspace emit more busy_ioctl when doing directly copy_area
> operations through scanout allowing forced psr exit.
I
On Wed, Jun 26, 2013 at 9:21 AM, wrote:
> From: Alex Deucher
>
> These are the radeon patches for 3.11. Some of these patches
> are huge so, it might be easier to review things here:
> http://cgit.freedesktop.org/~agd5f/linux/log/?h=drm-next-3.11-wip
Updated branch:
http://cgit.freedesktop.org
From: YoungJun Cho
The drm_gem_mmap_obj() has to be protected with dev->struct_mutex,
but some caller functions do not. So it adds mutex lock to missing
callers and adds assertion to check whether drm_gem_mmap_obj() is
called with mutex lock or not.
Signed-off-by: YoungJun Cho
Signed-off-by: Se
Hi Linus,
should be last two fixes for i915, one is for a fence leak killing X on
some older GPUs, and one is a late regression partial revert for an
swiotlb/xen/i915 interaction, Konrad has promised to figure out the proper
answer, and this patch is the best thing to do at this stage to avoid
From: YoungJun Cho
If idr_alloc() is failed, obj->name can be error value. Also
it cleans up duplicated flink processing code.
This regression has been introduced in
commit 2e928815c1886fe628ed54623aa98d0889cf5509
Author: Tejun Heo
Date: Wed Feb 27 17:04:08 2013 -0800
drm: convert to id
From: Dave Airlie
feel free to split this back up and merge it into the individual commits.
should probably also confirm its doing sane things.
Signed-off-by: Dave Airlie
---
drivers/gpu/drm/radeon/ni_dpm.c| 10 +-
drivers/gpu/drm/radeon/rv730_dpm.c |6 +++---
drivers/gpu/dr
Op 27-06-13 01:39, Seung-Woo Kim schreef:
> From: YoungJun Cho
>
> The drm_gem_mmap_obj() has to be protected with dev->struct_mutex,
> but some caller functions do not. So it adds mutex lock to missing
> callers and adds assertion to check whether drm_gem_mmap_obj() is
> called with mutex lock or
During exporting dma_buf, it can fail after dma_buf is exported. In this case,
exported dma_buf should be release with putting.
Also dma_buf_fd can be failed to get fd, but failure cases are not handled.
Error handling routine is not quite clean, so I send this patch set as RFC.
Seung-Woo Kim (1)
From: YoungJun Cho
When drm_prime_add_buf_handle() returns failure for an exported
dma_buf, the dma_buf was already allocated and its refcount was
increased, so it needs to be put.
Signed-off-by: YoungJun Cho
Signed-off-by: Seung-Woo Kim
Signed-off-by: Kyungmin Park
---
drivers/gpu/drm/drm_p
Signed-off-by: Seung-Woo Kim
Signed-off-by: YoungJun Cho
Signed-off-by: Kyungmin Park
---
drivers/gpu/drm/drm_prime.c | 32
1 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c
index afff7c8
From: YoungJun Cho
The dma_buf_fd() can return error when it fails to prepare fd,
so the dma_buf needs to be put.
Signed-off-by: YoungJun Cho
Signed-off-by: Seung-Woo Kim
Signed-off-by: Kyungmin Park
---
drivers/gpu/drm/drm_prime.c | 39 ---
1 files chan
From: YoungJun Cho
If idr_alloc() is failed, obj->name can be error value. Also
it cleans up duplicated flink processing code.
Signed-off-by: YoungJun Cho
Signed-off-by: Seung-Woo Kim
Signed-off-by: Kyungmin Park
---
drivers/gpu/drm/drm_gem.c | 18 +++---
1 files changed, 7 ins
From: YoungJun Cho
The drm_gem_mmap_obj() has to be protected with dev->struct_mutex,
but some caller functions do not. So it adds mutex lock to missing
callers and adds WARN_ON assertion whether drm_gem_mmap_obj() is
called with mutex lock or not.
Signed-off-by: YoungJun Cho
Signed-off-by: Seu
crtc active state doesn't match with hw state "
"(expected %i, found %i)\n", crtc->active, active);
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Op 26-06-13 04:14, Seung-Woo Kim schreef:
> From: YoungJun Cho
>
> The drm_gem_mmap_obj() has to be protected with dev->struct_mutex,
> but some caller functions do not. So it adds mutex lock to missing
> callers and adds WARN_ON assertion whether drm_gem_mmap_obj() is
> called with mutex lock or
t; I know some current code does it wrong, but that is the correct function
to use.
>
> ~Maarten
>
Thank you for nice comments!
I will update it again.
Best regards YJ
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> dri-devel mailing list
> dri-devel at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/dri-devel
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On Wed, Jun 26, 2013 at 10:42:39AM +0900, Seung-Woo Kim wrote:
> From: YoungJun Cho
>
> If idr_alloc() is failed, obj->name can be error value. Also
> it cleans up duplicated flink processing code.
You should mention that it is a regression from
commit 2e928815c (drm: convert to idr_alloc())
>
an/listinfo/dri-devel
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From: Alex Deucher
These are the radeon patches for 3.11. Some of these patches
are huge so, it might be easier to review things here:
http://cgit.freedesktop.org/~agd5f/linux/log/?h=drm-next-3.11-wip
I'll send a formal pull in request in the next day or two.
Highlights of this series:
- DPM s
From: Alex Deucher
- remove adding 2 to checksum, this is incorrect.
This was incorrectly introduced in:
92db7f6c860b8190571a9dc1fcbc16d003422fe8
http://lists.freedesktop.org/archives/dri-devel/2011-December/017717.html
However, the off by 2 was due to adding the version twice.
>From the example
From: Alex Deucher
New asics support non-privileged IBs. This allows us
to skip IB checking in the driver since the hardware
will check the command buffers for us. When using
non-privileged IBs, if the CP encounters an illegal
register in the command stream, it will halt and generate
an interru
From: Alex Deucher
Mac laptops with multiple GPUs apparently use the gmux
driver for backlight control. Don't register a radeon
backlight interface. We may need to add other pci ids
for other hybrid mac laptops.
Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=65377
Signed-off-by: Alex Deu
From: Alex Deucher
v2: tiling fixes
v3: more tiling fixes
v4: more tiling fixes
v5: additional register init
v6: rebase
v7: fix gb_addr_config for KV/KB
v8: drop wip KV bits for now, add missing config reg
v9: fix cu count on Bonaire
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/Makef
From: Alex Deucher
Redirect invalid memory accesses to the default page
instead of locking up the memory controller.
v2: rebase on top of 2 level PTs
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/cik.c | 15 +--
drivers/gpu/drm/radeon/cikd.h | 11 +++
2 files
From: Alex Deucher
Currently the driver required 6 sets of ucode:
1. pfp - pre-fetch parser, part of the GFX CP
2. me - micro engine, part of the GFX CP
3. ce - constant engine, part of the GFX CP
4. rlc - interrupt, etc. controller
5. mc - memory controller (discrete cards only)
6. mec - compute
From: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/radeon.h |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index f5fccbb..b50a786 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b
From: Alex Deucher
Update the page table base address and flush the
VM TLB using the CP.
v2: update for 2 level PTs
v3: use new packet for invalidate
v4: update SH_MEM* regs when flushing the VM
v5: add pfp sync, go back to old style vm TLB invalidate
v6: fix hdp flush packet count
v7: use old s
From: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/radeon_device.c |3 +++
drivers/gpu/drm/radeon/radeon_family.h |3 +++
2 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_device.c
b/drivers/gpu/drm/radeon/radeon_device.
From: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/cik.c | 10 ++
drivers/gpu/drm/radeon/cikd.h |4
2 files changed, 14 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
index 72c7e83..b70f017 10064
From: Alex Deucher
CIK has new asynchronous DMA engines called sDMA
(system DMA). Each engine supports 1 ring buffer
for kernel and gfx and 2 userspace queues for compute.
TODO: fill in the compute setup.
v2: update to the latest reset code
v3: remove ib_parse
v4: fix copy_dma()
v5: drop WIP c
From: Alex Deucher
The vm callbacks are the same as the SI ones right now
(same regs and bits). We could share the SI variants, and
I may yet do that, but I figured I would add CIK specific
ones for now in case we need to change anything.
V2: add documentation, minor fixes.
V3: integrate vram of
From: Alex Deucher
v2: further updates
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/atombios.h | 486 ++---
1 files changed, 454 insertions(+), 32 deletions(-)
diff --git a/drivers/gpu/drm/radeon/atombios.h
b/drivers/gpu/drm/radeon/atombios.h
index
From: Alex Deucher
v2: update to latest driver changes
v3: properly tear down vm on suspend
v4: fix up irq init ordering
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/cik.c | 340 ++
1 files changed, 340 insertions(+), 0 deletions(-)
diff --gi
From: Alex Deucher
v2: split soft reset into compute and gfx. Still need
to make reset more fine grained, but this should be a
start.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/cik.c | 197 +
drivers/gpu/drm/radeon/cikd.h | 80 ++
From: Alex Deucher
register BAR is now at PCI BAR 5.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/radeon_device.c |9 +++--
1 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_device.c
b/drivers/gpu/drm/radeon/radeon_device.c
index c2
From: Alex Deucher
For gfx ring only. Compute is still todo.
v2: add documentation
v3: update to latest reset changes, integrate emit update patch.
v4: fix count on wait_reg_mem for HDP flush
v5: use old hdp flush method for fence
v6: set valid bit for IB
v7: cleanup for release
Signed-off-by:
From: Alex Deucher
Load the GDDR5 ucode and train the links.
v2: update ucode
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/cik.c | 116 +
drivers/gpu/drm/radeon/cikd.h | 16 ++
2 files changed, 132 insertions(+), 0 deletions(-)
diff -
From: Alex Deucher
No support for reading the temperature yet.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/radeon.h |1 +
drivers/gpu/drm/radeon/radeon_atombios.c |6 ++
2 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon
From: Alex Deucher
Sets up the GFX ring and loads ucode for GFX and Compute.
Todo:
- handle compute queue setup.
v2: add documentation
v3: integrate with latest reset changes
v4: additional init fixes
v5: scratch reg write back no longer supported on CIK
v6: properly set CP_RB0_BASE_HI
v7: reba
From: Alex Deucher
Todo:
- handle interrupts for compute queues
v2: add documentation
v3: update to latest reset code
v4: update to latest illegal CP handling
v5: fix missing break in interrupt handler switch statement
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/cik.c| 840 +++
From: Alex Deucher
v2: add documenation
v3: update the latest ib changes
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/cik.c | 114 ++
1 files changed, 114 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/d
From: Alex Deucher
The register bits changed on DCE8 compared to previous
families.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/atombios_encoders.c |8 +++-
drivers/gpu/drm/radeon/cik_reg.h |3 +++
2 files changed, 10 insertions(+), 1 deletions(-)
diff --git a
From: Alex Deucher
Update the page table base address and flush the
VM TLB using the sDMA.
V2: update for 2 level PTs
V3: update vm flush
V4: update SH_MEM* regs
V5: switch back to old style VM TLB invalidate
V6: fix packet formatting
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/cik
From: Alex Deucher
Async page table updates using the sDMA engine. sDMA has a
special packet for updating entries for contiguous pages
that reduces overhead.
v2: add support for and use the CP for now.
v3: update for 2 level PTs
v4: rebase, fix DMA packet
v5: switch to using an IB
Signed-off-b
From: Alex Deucher
RLC handles the interrupt controller and other tasks
on the GPU.
v2: add documentation
v3: update programming sequence
v4: additional setup
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/cik.c | 142 +
drivers/gpu/drm/radeon
From: Alex Deucher
v2: make PPLL0 is available for non-DP on CI
v3: rebase changes, update documentation
v4: fix kabini
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/atombios_crtc.c | 48 +++-
1 files changed, 47 insertions(+), 1 deletions(-)
diff --git
From: Alex Deucher
v2: further updates
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/atombios.h | 58 ++--
1 files changed, 54 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/radeon/atombios.h
b/drivers/gpu/drm/radeon/atombios.h
index f19
From: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/atombios_crtc.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c
b/drivers/gpu/drm/radeon/atombios_crtc.c
index 24eee7c..c7ad4b9 100644
--- a/drivers/gpu/dr
From: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/radeon_atombios.c | 17 +
1 files changed, 17 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c
b/drivers/gpu/drm/radeon/radeon_atombios.c
index 88a55af..3236755 10064
From: Alex Deucher
v2: further updates
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/ObjectID.h | 40 +
1 files changed, 40 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/radeon/ObjectID.h
b/drivers/gpu/drm/radeon/ObjectID.h
index ca
101 - 200 of 335 matches
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