On 12/28/2012 09:57 AM, Mark Zhang wrote:
On 12/28/2012 03:45 PM, Arto Merilainen wrote:
On 12/28/2012 08:47 AM, Mark Zhang wrote:
+
+/* Add fences */
+if (num_fences) {
+
+tegra_stream_push(stream,
+nvhost_opcode_setclass(NV_HOST1X_CLASS_ID,
+host1x_ucla
On 12/28/2012 04:50 PM, Arto Merilainen wrote:
> On 12/28/2012 09:57 AM, Mark Zhang wrote:
>> On 12/28/2012 03:45 PM, Arto Merilainen wrote:
>>> On 12/28/2012 08:47 AM, Mark Zhang wrote:
> +
> +/* Add fences */
> +if (num_fences) {
> +
> +tegra_stream_push(stream
Hi Terje,
Here is the second part comments. I admit I still haven't finished
reading the codes... really too many codes. :)
Anyway I'll keep doing this when I have free slots.
diff --git a/drivers/gpu/drm/tegra/gr2d.c b/drivers/gpu/drm/tegra/gr2d.c
index a936902..c3ded60 100644
--- a/drivers/gpu/
On 12/28/2012 11:04 AM, Mark Zhang wrote:
On 12/28/2012 04:50 PM, Arto Merilainen wrote:
In my opinion asking tegra_stream_begin() to put a bad fence into the
stream is a case we should never be. assert() kills the application
immediately (in debug builds) and usually this helps the programmer
This patch adds device tree match table for Exynos G2D controller.
Signed-off-by: Ajay Kumar
---
drivers/gpu/drm/exynos/exynos_drm_g2d.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_g2d.c
b/drivers/gpu/drm/exynos/exynos_drm_g2d.c
index 6ffa07
On 27 December 2012 15:43, Inki Dae wrote:
>
>
> 2012/12/26 Sachin Kamat
>>
>>
>>
>> On Wednesday, 26 December 2012, Inki Dae wrote:
>> >
>> >
>> > 2012/12/24 Sachin Kamat
>> >>
>> >> This eliminates the need for explicit clk_put and makes the
>> >> cleanup and exit path code simpler.
>> >>
>>
This patch set adds support for more resolutions and refresh rates to Samsung
Exynos5 SoC series which contains hdmi transmitter (hdmi v1.4a compliant).
Given resolution will be supported or not, is decided by two factors:
1) Corresponding pixel clock is supported by hdmi PHY.
2) Mixer supports th
This patch adds the display mode check operation to exynos_mixer_ops
in drm-common-hdmi. In Exynos SoCs, mixer IP can put certain restrictions
on the proposed display modes. These restriction needs to be considered
during mode negotiation, which happens immediately after edid parsing.
Both, mixer
This patch adds the implementation of check_mode callback in the mixer
driver. Based on the mixer version, correct set of restrictions will be
exposed by the mixer driver. A resolution will be acceptable only if passes
the criteria set by mixer and hdmi IPs.
Signed-off-by: Rahul Sharma
Signed-off
With this patch, mixer driver find the correct resolution mode for
the range of resolutions, upto 1080 vertical lines. Resolution will
be categorized to NTSC SD, PAL SD or HD and the correct mode is
set to the mixer configuration register.
Signed-off-by: Rahul Sharma
Signed-off-by: Sean Paul
---
From: Sean Paul
This patch programs the core and timing generator registers using the
timing data provided in drm_display_mode and not using hard-coded
configurations.
Additional PHY configs has been added. This allows us to support more
permissible resolutions and refresh rates.
Signed-off-by:
On 27 December 2012 20:13, Tomasz Figa wrote:
> Hi Laurent,
>
> On Monday 24 of December 2012 15:12:28 Laurent Pinchart wrote:
>> Hi Tomasz,
>>
>> On Friday 21 December 2012 11:00:52 Tomasz Figa wrote:
>> > On Tuesday 18 of December 2012 08:31:30 Vikas Sajjan wrote:
>> > > On 17 December 2012 20:5
There's no need to allocate edid twice and do a memcpy when drm helpers
exist to do just that. This patch cleans that interaction up, and
doesn't keep the edid hanging around in the connector.
Signed-off-by: Sean Paul
Signed-off-by: Rahul Sharma
---
This patch is based on branch "exynos-drm-next
https://bugs.freedesktop.org/show_bug.cgi?id=43829
--- Comment #17 from klausenb...@hotmail.com ---
(In reply to comment #16)
> (In reply to comment #15)
> > A patch referencing this bug report has been merged in Linux v3.7-rc1:
> >
> > commit bced76f27165ca7733437715185c3a1aa526f7a1
> > Author:
https://bugs.freedesktop.org/show_bug.cgi?id=49981
--- Comment #24 from Anthony Waters ---
On a HD6950 this patches causes the GPU to lock up if the GPU is in the low
power profile and the x server is started with multiple monitors attached. The
x server doesn't crash immediatly, but crashes upo
https://bugs.freedesktop.org/show_bug.cgi?id=43167
--- Comment #43 from al...@verizon.net ---
(In reply to comment #42)
> Does dropping 'm' from the modeline solve your problem?
Hi Jani,
I cannot believe this !!!
# The "old", subject machine:
# "ASUS P5E-VM HDMI" with Intel G35/ICH9R, Intel C
On Fri, Dec 28, 2012 at 09:45:48AM +0200, Arto Merilainen wrote:
> On 12/28/2012 08:47 AM, Mark Zhang wrote:
> >>+int tegra_fence_is_valid(const struct tegra_fence *fence)
> >>+{
> >>+int valid = fence ? 1 : 0;
> >>+valid = valid && fence->id != (uint32_t) -1;
> >>+valid = valid && fenc
https://bugs.freedesktop.org/show_bug.cgi?id=33418
almos changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
https://bugs.freedesktop.org/show_bug.cgi?id=58839
Priority: medium
Bug ID: 58839
Assignee: dri-devel@lists.freedesktop.org
Summary: errors about too many fences printed while playing
neverball
Severity: normal
Classifica
https://bugs.freedesktop.org/show_bug.cgi?id=58840
Priority: medium
Bug ID: 58840
Assignee: dri-devel@lists.freedesktop.org
Summary: rendering error with MSAA on HD6850
Severity: normal
Classification: Unclassified
OS: All
On Mon, Dec 24, 2012 at 10:25:00PM -0700, Stephen Warren wrote:
> On 12/21/2012 11:50 PM, Terje Bergström wrote:
> > On 21.12.2012 16:36, Thierry Reding wrote:
> >> On Fri, Dec 21, 2012 at 01:39:21PM +0200, Terje Bergstrom wrote:
> >>> +static struct platform_driver tegra_drm_platform_driver = {
>
https://bugs.freedesktop.org/show_bug.cgi?id=58042
Bryan Quigley changed:
What|Removed |Added
CC||bryanquig...@ubuntu.com
--- Comment #5 f
https://bugzilla.kernel.org/show_bug.cgi?id=51581
--- Comment #1 from Suloev Dmitry 2012-12-29 06:30:53
---
Any news?
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https://bugzilla.kernel.org/show_bug.cgi?id=50091
Suloev Dmitry changed:
What|Removed |Added
CC||suloevdmi...@gmail.com
--- Comment #2
On Thu, Dec 27, 2012 at 01:57:56PM -0600, Rob Clark wrote:
> On Thu, Dec 27, 2012 at 1:18 PM, Sascha Hauer
> wrote:
> > On Thu, Dec 27, 2012 at 09:54:55AM -0600, Rob Clark wrote:
> >> On Mon, Dec 24, 2012 at 7:37 AM, Laurent Pinchart
> >
> > This implies that the master driver knows all potential
eedesktop.org/archives/dri-devel/attachments/20121228/f1a6d13d/attachment.html>
Hello Inki Dae,
On Thu, Dec 27, 2012 at 11:47 AM, Inki Dae wrote:
>
> Hi,
>
> DISP1BLK_CFG register is related to GScaler, HDCP and MIXER as well. So
> it's not good that this register is controlled in fimd module. And I think
> the function to control the register should be placed in SoC common
2012/12/28 Leela Krishna Amudala :
> Hello Inki Dae,
>
> On Thu, Dec 27, 2012 at 11:47 AM, Inki Dae wrote:
>>
>> Hi,
>>
>> DISP1BLK_CFG register is related to GScaler, HDCP and MIXER as well. So
>> it's not good that this register is controlled in fimd module. And I think
>> the function to contro
I just skimmed the code of libdrm while I'm trying to understand the
host1x driver. So below is what I found.
Mark
On 12/13/2012 10:01 PM, Arto Meril?inen wrote:
> From: Arto Merilainen
>
> This patch introduces tegra stream library. The library is used for
> buffer management, command stream co
I just skimmed the code of libdrm while I'm trying to understand the
host1x driver. So below is what I found.
Mark
On 12/13/2012 10:01 PM, Arto Meril?inen wrote:
> From: Francis Hart
>
> This patch introduces a simple 2d library on top of stream library.
>
> Signed-off-by: Francis Hart
[...]
>
On 12/28/2012 08:47 AM, Mark Zhang wrote:
>> +int tegra_fence_is_valid(const struct tegra_fence *fence)
>> +{
>> +int valid = fence ? 1 : 0;
>> +valid = valid && fence->id != (uint32_t) -1;
>> +valid = valid && fence->id < 32;
>
> Hardcode here. Assume always has 32 syncpts.
> Change to
On 12/28/2012 03:45 PM, Arto Merilainen wrote:
> On 12/28/2012 08:47 AM, Mark Zhang wrote:
>>> +int tegra_fence_is_valid(const struct tegra_fence *fence)
>>> +{
>>> +int valid = fence ? 1 : 0;
>>> +valid = valid && fence->id != (uint32_t) -1;
>>> +valid = valid && fence->id < 32;
>>
>>
On 12/28/2012 09:57 AM, Mark Zhang wrote:
> On 12/28/2012 03:45 PM, Arto Merilainen wrote:
>> On 12/28/2012 08:47 AM, Mark Zhang wrote:
+
+/* Add fences */
+if (num_fences) {
+
+tegra_stream_push(stream,
+nvhost_opcode_setclass(NV_HOST1X_CLA
On 12/28/2012 04:50 PM, Arto Merilainen wrote:
> On 12/28/2012 09:57 AM, Mark Zhang wrote:
>> On 12/28/2012 03:45 PM, Arto Merilainen wrote:
>>> On 12/28/2012 08:47 AM, Mark Zhang wrote:
> +
> +/* Add fences */
> +if (num_fences) {
> +
> +tegra_stream_push(stream
Hi Terje,
Here is the second part comments. I admit I still haven't finished
reading the codes... really too many codes. :)
Anyway I'll keep doing this when I have free slots.
diff --git a/drivers/gpu/drm/tegra/gr2d.c b/drivers/gpu/drm/tegra/gr2d.c
index a936902..c3ded60 100644
--- a/drivers/gpu/
On 12/28/2012 11:04 AM, Mark Zhang wrote:
> On 12/28/2012 04:50 PM, Arto Merilainen wrote:
>>
>> In my opinion asking tegra_stream_begin() to put a bad fence into the
>> stream is a case we should never be. assert() kills the application
>> immediately (in debug builds) and usually this helps the p
On 27 December 2012 20:13, Tomasz Figa wrote:
> Hi Laurent,
>
> On Monday 24 of December 2012 15:12:28 Laurent Pinchart wrote:
>> Hi Tomasz,
>>
>> On Friday 21 December 2012 11:00:52 Tomasz Figa wrote:
>> > On Tuesday 18 of December 2012 08:31:30 Vikas Sajjan wrote:
>> > > On 17 December 2012 20:5
There's no need to allocate edid twice and do a memcpy when drm helpers
exist to do just that. This patch cleans that interaction up, and
doesn't keep the edid hanging around in the connector.
Signed-off-by: Sean Paul
Signed-off-by: Rahul Sharma
---
This patch is based on branch "exynos-drm-next
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e for the bug.
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esolutions)?
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g with that. What we want is software that works unmodified
on as many generations of Tegra as possible.
Thierry
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ings clearer. I haven't tested it on real hardware yet because I don't
have access over the holidays, but I'll post the patch once I've
verified that it actually works. The code is based on patches 1-4 of
this series and is meant to replace patch 5.
Thierry
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This eliminates the need for explicit clk_put and makes the
cleanup and exit path code simpler.
Cc: Eunchul Kim
Signed-off-by: Sachin Kamat
---
drivers/gpu/drm/exynos/exynos_drm_fimc.c | 45 ++
1 files changed, 9 insertions(+), 36 deletions(-)
diff --git a/drivers
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