On 09/05/2023 11:49, Jocelyn Falempe wrote:
On 08/05/2023 10:04, Thomas Zimmermann wrote:
Hi Jocelyn
Am 05.05.23 um 14:43 schrieb Jocelyn Falempe:
[cut]
+ /* pad each line to 32bits boundaries see section 4.5.7 of G200
Specification */
+ int width_padded = round_up(width * cpp, 4);
+
On 08/05/2023 10:04, Thomas Zimmermann wrote:
Hi Jocelyn
Am 05.05.23 um 14:43 schrieb Jocelyn Falempe:
Even if the transfer is not faster, it brings significant
improvement in latencies and CPU usage.
I think I shot down this patch already. I don't want to maintain the
extra code for DMA su
Hi Jocelyn
Am 05.05.23 um 14:43 schrieb Jocelyn Falempe:
Even if the transfer is not faster, it brings significant
improvement in latencies and CPU usage.
I think I shot down this patch already. I don't want to maintain the
extra code for DMA support.
CPU usage drops from 100% of one cor
Hi Jocelyn,
kernel test robot noticed the following build warnings:
[auto build test WARNING on 457391b0380335d5e9a5babdec90ac53928b23b4]
url:
https://github.com/intel-lab-lkp/linux/commits/Jocelyn-Falempe/drm-mgag200-Rename-constant-MGAREG_Status-to-MGAREG_STATUS/20230505-204705
base: 457
Hi Jocelyn,
kernel test robot noticed the following build warnings:
[auto build test WARNING on 457391b0380335d5e9a5babdec90ac53928b23b4]
url:
https://github.com/intel-lab-lkp/linux/commits/Jocelyn-Falempe/drm-mgag200-Rename-constant-MGAREG_Status-to-MGAREG_STATUS/20230505-204705
base: 457
