On Wed, Feb 16, 2022 at 09:36:02AM +, Hogander, Jouni wrote:
On Wed, 2022-02-16 at 10:50 +0200, Ville Syrjälä wrote:
On Tue, Feb 15, 2022 at 11:21:54AM +0530, Ramalingam C wrote:
> From: Jouni Högander
>
> Currently ICL_PHY_MISC macro is returning offset 0x64C10 for PHY_E
> port. Correct of
On Wed, Feb 16, 2022 at 02:11:54PM +, Hogander, Jouni wrote:
> On Wed, 2022-02-16 at 12:07 +0200, Ville Syrjälä wrote:
> > On Wed, Feb 16, 2022 at 09:36:02AM +, Hogander, Jouni wrote:
> > > On Wed, 2022-02-16 at 10:50 +0200, Ville Syrjälä wrote:
> > > > On Tue, Feb 15, 2022 at 11:21:54AM +0
On Wed, 2022-02-16 at 12:07 +0200, Ville Syrjälä wrote:
> On Wed, Feb 16, 2022 at 09:36:02AM +, Hogander, Jouni wrote:
> > On Wed, 2022-02-16 at 10:50 +0200, Ville Syrjälä wrote:
> > > On Tue, Feb 15, 2022 at 11:21:54AM +0530, Ramalingam C wrote:
> > > > From: Jouni Högander
> > > >
> > > > C
On Wed, Feb 16, 2022 at 09:36:02AM +, Hogander, Jouni wrote:
> On Wed, 2022-02-16 at 10:50 +0200, Ville Syrjälä wrote:
> > On Tue, Feb 15, 2022 at 11:21:54AM +0530, Ramalingam C wrote:
> > > From: Jouni Högander
> > >
> > > Currently ICL_PHY_MISC macro is returning offset 0x64C10 for PHY_E
>
On Wed, 2022-02-16 at 10:50 +0200, Ville Syrjälä wrote:
> On Tue, Feb 15, 2022 at 11:21:54AM +0530, Ramalingam C wrote:
> > From: Jouni Högander
> >
> > Currently ICL_PHY_MISC macro is returning offset 0x64C10 for PHY_E
> > port. Correct offset is 0x64C14.
>
> Why is it PHY_E and not PHY_F?
Thi
On Tue, Feb 15, 2022 at 11:21:54AM +0530, Ramalingam C wrote:
> From: Jouni Högander
>
> Currently ICL_PHY_MISC macro is returning offset 0x64C10 for PHY_E
> port. Correct offset is 0x64C14.
Why is it PHY_E and not PHY_F?
>
> Fix this by handling PHY_E port seprately.
>
> Signed-off-by: Matt
> -Original Message-
> From: C, Ramalingam
> Sent: Tuesday, February 15, 2022 11:22 AM
> To: intel-gfx ; dri-devel de...@lists.freedesktop.org>
> Cc: Ville Syrjälä ; Shankar, Uma
> ; Hogander, Jouni ; C,
> Ramalingam
> Subject: [PATCH 3/3] drm/i915: Fix for PHY_MISC_TC1 offset
>
> Fro