Re: [PATCH] drm/v3d: fix wait for TMU write combiner flush

2021-09-15 Thread Iago Toral
On Wed, 2021-09-15 at 09:57 +0100, Melissa Wen wrote: > On 09/14, Iago Toral Quiroga wrote: > > The hardware sets the TMUWCF bit back to 0 when the TMU write > > combiner flush completes so we should be checking for that instead > > of the L2TFLS bit. > > > > Fixes spurious Vulkan CTS failures in:

Re: [PATCH] drm/v3d: fix wait for TMU write combiner flush

2021-09-15 Thread Melissa Wen
On 09/14, Iago Toral Quiroga wrote: > The hardware sets the TMUWCF bit back to 0 when the TMU write > combiner flush completes so we should be checking for that instead > of the L2TFLS bit. > > Fixes spurious Vulkan CTS failures in: > dEQP-VK.binding_model.descriptorset_random.* Hi Iago, makes se