On 19/12/17 08:53, Andrzej Hajda wrote:
> On 18.12.2017 12:39, Marc Zyngier wrote:
>> The analogix DP bridge is entierely driven via MMIO accesses, and
>> does not do any DMA that requires coherency with the CPU. Yet, the
>> driver uses the non-relaxed accessors, forcing strong barriers to
>> be em
On 18.12.2017 12:39, Marc Zyngier wrote:
> The analogix DP bridge is entierely driven via MMIO accesses, and
> does not do any DMA that requires coherency with the CPU. Yet, the
> driver uses the non-relaxed accessors, forcing strong barriers to
> be emitted on architectures with a relaxed memory o
