t: Re: [PATCH 07/10] drm: xlnx: DRM KMS driver for Xilinx ZynqMP
> DP subsystem display
>
> On Thu, Jan 04, 2018 at 06:05:56PM -0800, Hyun Kwon wrote:
> > Xilinx ZynqMP has a hardened display pipeline. The pipeline can
> > be logically partitioned into 2 parts: display and Dis
On Thu, Jan 04, 2018 at 06:05:56PM -0800, Hyun Kwon wrote:
> Xilinx ZynqMP has a hardened display pipeline. The pipeline can
> be logically partitioned into 2 parts: display and DisplayPort.
> This driver handles the display part of the pipeline that handles
> buffer management and blending.
>
> S
