RE: DRM Display driver for Intel FPGA Video and Image Processing Suite

2017-04-10 Thread Ong, Hean Loong
>helping maintaining it going forward (but if that doesn't happen, also no big >deal). >-Daniel > >> >>>-Original Message----- >>>From: daniel.vet...@ffwll.ch [mailto:daniel.vet...@ffwll.ch] On Behalf >>>Of Daniel Vetter >>>Sent: Sat

Re: DRM Display driver for Intel FPGA Video and Image Processing Suite

2017-04-10 Thread Daniel Vetter
Hean Loong >>Cc: Vetter, Daniel ; airl...@linux.ie; dri- >>de...@lists.freedesktop.org >>Subject: Re: DRM Display driver for Intel FPGA Video and Image Processing >>Suite >> >>On Sat, Apr 8, 2017 at 7:41 AM, Ong, Hean Loong >>wrote: >>> Hi Daniel >

RE: DRM Display driver for Intel FPGA Video and Image Processing Suite

2017-04-09 Thread Ong, Hean Loong
] On Behalf Of >Daniel >Vetter >Sent: Saturday, April 8, 2017 12:32 AM >To: Ong, Hean Loong >Cc: Vetter, Daniel ; airl...@linux.ie; dri- >de...@lists.freedesktop.org >Subject: Re: DRM Display driver for Intel FPGA Video and Image Processing Suite > >On Thu, Apr 6, 20

Re: DRM Display driver for Intel FPGA Video and Image Processing Suite

2017-04-08 Thread Daniel Vetter
gt;>Sent: Saturday, April 8, 2017 12:32 AM >>To: Ong, Hean Loong >>Cc: Vetter, Daniel ; airl...@linux.ie; dri- >>de...@lists.freedesktop.org >>Subject: Re: DRM Display driver for Intel FPGA Video and Image Processing >>Suite >> >>On Thu, Apr 6, 2017 at 8:

Re: DRM Display driver for Intel FPGA Video and Image Processing Suite

2017-04-07 Thread Daniel Vetter
ivers/gpu/drm/ivip/intel_vip_of.c >> new file mode 100644 >> index 000..17dff36 >> --- /dev/null >> +++ b/drivers/gpu/drm/ivip/intel_vip_of.c >> @@ -0,0 +1,146 @@ >> +/* >> + * intel_vip_of.c -- Intel Video and Image Processing(VIP) >> + * Frame Buffer

Re: DRM Display driver for Intel FPGA Video and Image Processing Suite

2017-04-06 Thread Ong, Hean Loong
ght", > +    &fbdata->info.var.yres); > + if (ret) { > + dev_err(&pdev->dev, > + "Missing required parameter 'altr,max- > height'"); > + return ret; > + } > +

RE: DRM Display driver for Intel FPGA Video and Image Processing Suite

2017-04-05 Thread Ong, Hean Loong
); +} + +/* + * The name vip-frame-buffer-2.0 is derived from + * http://www.altera.com/literature/ug/ug_vip.pdf + * frame buffer IP cores section 14 + */ + +static const struct of_device_id intelvipfb_of_match[] = { + { .compatible = "altr,vip-frame-buffer-2.0" }, + {}, +}; +

Re: DRM Display driver for Intel FPGA Video and Image Processing Suite

2017-04-02 Thread Daniel Vetter
On Fri, Mar 31, 2017 at 09:08:37AM +, Ong, Hean Loong wrote: > Hi, > > I would like to upstream the attached Intel FPGA Video and Image > Processing Suite. The attached patch supports the Intel Arria10 devkit > and its variants. The purpose of the patch is to enable the FPGA driven > display d

DRM Display driver for Intel FPGA Video and Image Processing Suite

2017-04-01 Thread Ong, Hean Loong
Hi, I would like to upstream the attached Intel FPGA Video and Image Processing Suite. The attached patch supports the Intel Arria10 devkit and its variants. The purpose of the patch is to enable the FPGA driven display designed from the Intel Quartus FPGA design suite. The driver is required as