On Sat, May 20, 2017 at 2:06 AM, Icenowy Zheng wrote:
>
>
> 于 2017年5月20日 GMT+08:00 上午2:02:15, Maxime Ripard
> 写到:
>>On Thu, May 18, 2017 at 12:43:44AM +0800, Icenowy Zheng wrote:
>>> -On SoCs other than the A33 and V3s, there is one more clock
>>required:
>>> +For the following compatibles:
>>>
于 2017年5月20日 GMT+08:00 上午2:02:15, Maxime Ripard
写到:
>On Thu, May 18, 2017 at 12:43:44AM +0800, Icenowy Zheng wrote:
>> -On SoCs other than the A33 and V3s, there is one more clock
>required:
>> +For the following compatibles:
>> + * allwinner,sun5i-a13-tcon
>> + * allwinner,sun6i-a31-tcon
>
On Thu, May 18, 2017 at 12:43:44AM +0800, Icenowy Zheng wrote:
> -On SoCs other than the A33 and V3s, there is one more clock required:
> +For the following compatibles:
> + * allwinner,sun5i-a13-tcon
> + * allwinner,sun6i-a31-tcon
> + * allwinner,sun6i-a31s-tcon
> + * allwinner,sun8i-a33-t
Allwinner H3 features a "DE2.0" and a TV Encoder.
Add device tree bindings for the following parts:
- H3 TCONs
- H3 Mixers
- The connection between H3 TCONs and H3 Mixers
- H3 TV Encoder
- H3 Display engine
Signed-off-by: Icenowy Zheng
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.../bindings/display/sunxi/sun4i-drm.txt | 47
