On Thu, 2017-08-10 at 11:59 -0500, Rob Herring wrote:
> On Thu, Aug 03, 2017 at 01:01:34PM +0800, Hean Loong, Ong wrote:
> >
> > From: Ong Hean Loong
> I take back my ack...
>
> Laurent's comments on v4 are not addressed.
>
Noted.
> >
> > Device tree binding for Intel FPGA Video and Image
> >
On Thu, Aug 03, 2017 at 01:01:34PM +0800, Hean Loong, Ong wrote:
> From: Ong Hean Loong
I take back my ack...
Laurent's comments on v4 are not addressed.
> Device tree binding for Intel FPGA Video and Image
> Processing Suite. The binding involved would be generated
> from the Altera (Intel) Qs
On Thu, Aug 03, 2017 at 01:01:34PM +0800, Hean Loong, Ong wrote:
> From: Ong Hean Loong
Why did you change the subject? "dt-bindings: display: ..." for the
subject was correct.
With subject fixed,
Acked-by: Rob Herring
>
> Device tree binding for Intel FPGA Video and Image
> Processing Suit
From: Ong Hean Loong
Device tree binding for Intel FPGA Video and Image
Processing Suite. The binding involved would be generated
from the Altera (Intel) Qsys system. The bindings would
set the max width, max height, buts per pixel and memory
port width. The device tree binding only supports the
