Hi Lee,
On 07/10/2014 14:22, Lee Jones :
> On Tue, 07 Oct 2014, Thierry Reding wrote:
>> On Tue, Oct 07, 2014 at 01:41:12PM +0200, Boris Brezillon wrote:
>>> On Tue, 7 Oct 2014 12:38:14 +0100
>>> Lee Jones wrote:
>>>
On Tue, 07 Oct 2014, Thierry Reding wrote:
> On Tue, Oct 07, 2014
> >> That said, Nicolas Ferre (Cc'ing) at some point requested this to become
> >> a select (or at least for the DRM driver, but I guess the same applies
> >> to PWM) on the grounds that a depends on will make it more difficult to
> >> enable the driver.
> >
> > It's not that much more difficult.
On Tue, Oct 07, 2014 at 01:41:12PM +0200, Boris Brezillon wrote:
> On Tue, 7 Oct 2014 12:38:14 +0100
> Lee Jones wrote:
>
> > On Tue, 07 Oct 2014, Thierry Reding wrote:
> >
> > > On Tue, Oct 07, 2014 at 11:17:43AM +0100, Lee Jones wrote:
> > > > On Tue, 07 Oct 2014, Thierry Reding wrote:
> > > >
On Tue, 7 Oct 2014 12:38:14 +0100
Lee Jones wrote:
> On Tue, 07 Oct 2014, Thierry Reding wrote:
>
> > On Tue, Oct 07, 2014 at 11:17:43AM +0100, Lee Jones wrote:
> > > On Tue, 07 Oct 2014, Thierry Reding wrote:
> > >
> > > > On Tue, Oct 07, 2014 at 10:59:32AM +0100, Lee Jones wrote:
> > > > > On
On Tue, 07 Oct 2014, Thierry Reding wrote:
> On Tue, Oct 07, 2014 at 01:41:12PM +0200, Boris Brezillon wrote:
> > On Tue, 7 Oct 2014 12:38:14 +0100
> > Lee Jones wrote:
> >
> > > On Tue, 07 Oct 2014, Thierry Reding wrote:
> > >
> > > > On Tue, Oct 07, 2014 at 11:17:43AM +0100, Lee Jones wrote:
>
On Tue, Oct 07, 2014 at 11:17:43AM +0100, Lee Jones wrote:
> On Tue, 07 Oct 2014, Thierry Reding wrote:
>
> > On Tue, Oct 07, 2014 at 10:59:32AM +0100, Lee Jones wrote:
> > > On Tue, 07 Oct 2014, Thierry Reding wrote:
> > >
> > > > On Tue, Oct 07, 2014 at 10:44:27AM +0100, Lee Jones wrote:
> > >
On Tue, 07 Oct 2014, Lee Jones wrote:
> On Tue, 07 Oct 2014, Boris Brezillon wrote:
>
> > On Tue, 7 Oct 2014 12:38:14 +0100
> > Lee Jones wrote:
> >
> > > On Tue, 07 Oct 2014, Thierry Reding wrote:
> > >
> > > > On Tue, Oct 07, 2014 at 11:17:43AM +0100, Lee Jones wrote:
> > > > > On Tue, 07 Oc
On Tue, 07 Oct 2014, Boris Brezillon wrote:
> On Tue, 7 Oct 2014 12:38:14 +0100
> Lee Jones wrote:
>
> > On Tue, 07 Oct 2014, Thierry Reding wrote:
> >
> > > On Tue, Oct 07, 2014 at 11:17:43AM +0100, Lee Jones wrote:
> > > > On Tue, 07 Oct 2014, Thierry Reding wrote:
> > > >
> > > > > On Tue,
On Tue, 07 Oct 2014, Thierry Reding wrote:
> On Tue, Oct 07, 2014 at 11:17:43AM +0100, Lee Jones wrote:
> > On Tue, 07 Oct 2014, Thierry Reding wrote:
> >
> > > On Tue, Oct 07, 2014 at 10:59:32AM +0100, Lee Jones wrote:
> > > > On Tue, 07 Oct 2014, Thierry Reding wrote:
> > > >
> > > > > On Tue,
On Tue, Oct 07, 2014 at 10:59:32AM +0100, Lee Jones wrote:
> On Tue, 07 Oct 2014, Thierry Reding wrote:
>
> > On Tue, Oct 07, 2014 at 10:44:27AM +0100, Lee Jones wrote:
> > > On Mon, 06 Oct 2014, Boris Brezillon wrote:
> > >
> > > > The HLCDC IP available on some Atmel SoCs (i.e. at91sam9n12, at9
On Tue, Oct 07, 2014 at 10:44:27AM +0100, Lee Jones wrote:
> On Mon, 06 Oct 2014, Boris Brezillon wrote:
>
> > The HLCDC IP available on some Atmel SoCs (i.e. at91sam9n12, at91sam9x5
> > family or sama5d3 family) exposes 2 subdevices:
> > - a display controller (controlled by a DRM driver)
> > - a
On Tue, 07 Oct 2014, Thierry Reding wrote:
> On Tue, Oct 07, 2014 at 10:59:32AM +0100, Lee Jones wrote:
> > On Tue, 07 Oct 2014, Thierry Reding wrote:
> >
> > > On Tue, Oct 07, 2014 at 10:44:27AM +0100, Lee Jones wrote:
> > > > On Mon, 06 Oct 2014, Boris Brezillon wrote:
> > > >
> > > > > The HL
On Tue, 07 Oct 2014, Thierry Reding wrote:
> On Tue, Oct 07, 2014 at 10:44:27AM +0100, Lee Jones wrote:
> > On Mon, 06 Oct 2014, Boris Brezillon wrote:
> >
> > > The HLCDC IP available on some Atmel SoCs (i.e. at91sam9n12, at91sam9x5
> > > family or sama5d3 family) exposes 2 subdevices:
> > > - a
On Mon, 06 Oct 2014, Boris Brezillon wrote:
> The HLCDC IP available on some Atmel SoCs (i.e. at91sam9n12, at91sam9x5
> family or sama5d3 family) exposes 2 subdevices:
> - a display controller (controlled by a DRM driver)
> - a PWM chip
>
> The MFD device provides a regmap and several clocks (tho
The HLCDC IP available on some Atmel SoCs (i.e. at91sam9n12, at91sam9x5
family or sama5d3 family) exposes 2 subdevices:
- a display controller (controlled by a DRM driver)
- a PWM chip
The MFD device provides a regmap and several clocks (those connected
to this hardware block) to its subdevices.
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