Hi,
On Mon 07 Dec 20, 11:42, Maxime Ripard wrote:
> On Wed, Dec 02, 2020 at 05:06:40PM +0100, Paul Kocialkowski wrote:
> > > > +static void logicvc_crtc_atomic_begin(struct drm_crtc *drm_crtc,
> > > > + struct drm_atomic_state *state)
> > > > +{
> > > > +
On Wed, Dec 02, 2020 at 05:06:40PM +0100, Paul Kocialkowski wrote:
> > > +static void logicvc_crtc_atomic_begin(struct drm_crtc *drm_crtc,
> > > + struct drm_atomic_state *state)
> > > +{
> > > + struct logicvc_crtc *crtc = logicvc_crtc(drm_crtc);
> > > + struct drm_cr
Hi,
On Tue 03 Nov 20, 10:46, Maxime Ripard wrote:
> On Mon, Nov 02, 2020 at 04:53:07PM +0100, Paul Kocialkowski wrote:
> > Introduces a driver for the LogiCVC display controller, a programmable
> > logic controller optimized for use in Xilinx Zynq-7000 SoCs and other
> > Xilinx FPGAs. The controll
Hi Sam,
On Wed 04 Nov 20, 22:22, Sam Ravnborg wrote:
> Hi Paul.
>
> A few comments in the following. I did not find time to read all of the
> driver.
Thanks for taking a look at the driver!
>
> Sam
>
> On Mon, Nov 02, 2020 at 04:53:07PM +0100, Paul Kocialkowski wrote:
> > Introduces a d
Hi Paul.
A few comments in the following. I did not find time to read all of the
driver.
Sam
On Mon, Nov 02, 2020 at 04:53:07PM +0100, Paul Kocialkowski wrote:
> Introduces a driver for the LogiCVC display controller, a programmable
> logic controller optimized for use in Xilinx Zynq-700
On Mon, Nov 02, 2020 at 04:53:07PM +0100, Paul Kocialkowski wrote:
> Introduces a driver for the LogiCVC display controller, a programmable
> logic controller optimized for use in Xilinx Zynq-7000 SoCs and other
> Xilinx FPGAs. The controller is mostly configured at logic synthesis
> time so only a
Introduces a driver for the LogiCVC display controller, a programmable
logic controller optimized for use in Xilinx Zynq-7000 SoCs and other
Xilinx FPGAs. The controller is mostly configured at logic synthesis
time so only a subset of configuration is left for the driver to
handle.
The following f
