Re: [PATCH v7 03/43] drm/mediatek: mtk_dpi: Use an array for pixclk factor calculation

2025-03-02 Thread Chun-Kuang Hu
Hi, Angelo: AngeloGioacchino Del Regno 於 2025年2月17日 週一 下午11:49寫道: > > Setting the TVD PLL clock requires to multiply the target pixel > clock by a specific constant factor to achieve the target PLL > frequency, and this is done to reduce jitter to acceptable levels. > > On all MediaTek SoCs, the

Re: [PATCH v7 03/43] drm/mediatek: mtk_dpi: Use an array for pixclk factor calculation

2025-03-02 Thread Chun-Kuang Hu
Hi, Angelo: AngeloGioacchino Del Regno 於 2025年2月17日 週一 下午11:49寫道: > > Setting the TVD PLL clock requires to multiply the target pixel > clock by a specific constant factor to achieve the target PLL > frequency, and this is done to reduce jitter to acceptable levels. > > On all MediaTek SoCs, the

[PATCH v7 03/43] drm/mediatek: mtk_dpi: Use an array for pixclk factor calculation

2025-02-17 Thread AngeloGioacchino Del Regno
Setting the TVD PLL clock requires to multiply the target pixel clock by a specific constant factor to achieve the target PLL frequency, and this is done to reduce jitter to acceptable levels. On all MediaTek SoCs, the factor is not retrieved by any real kind of calculation but rather by checking