, Jani
> > ; Hogander, Jouni ;
> > Murthy, Arun R ; Manna, Animesh
> >
> > Subject: [PATCH v6 5/6] drm/i915/panelreplay: enable/disable panel
> > replay
> >
> > TRANS_DP2_CTL register is programmed to enable panel replay from
> > source and sink is enabled through p
> -Original Message-
> From: Manna, Animesh
> Sent: Thursday, September 21, 2023 11:44 AM
> To: intel-...@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org; Nikula, Jani ;
> Hogander, Jouni ; Murthy, Arun R
> ; Manna, Animesh
> Subject: [PATCH v6 5
TRANS_DP2_CTL register is programmed to enable panel replay from source
and sink is enabled through panel replay dpcd configuration address.
Bspec: 1407940617
v1: Initial version.
v2:
- Use pr_* flags instead psr_* flags. [Jouni]
- Remove intel_dp_is_edp check as edp1.5 also has panel replay. [Jo
