On 6/21/24 16:55, Yannick FERTRE wrote:
Hi Raphaël,
Thanks for your patch, it will not merged due to a new clock management.
Philippe,
this patch will be replaced by another which manages all clocks that the
display controller
will need (pixel clock, bus clock reference clock).
Hi Rap
Hi Raphaël,
Thanks for your patch, it will not merged due to a new clock management.
Philippe,
this patch will be replaced by another which manages all clocks that the
display controller
will need (pixel clock, bus clock reference clock).
Best regards
Le 26/02/2024 à 11:48, Raphael Gall
The STM32MP25x display subsystem presents a mux which feeds the loopback
pixel clock of the current bridge in use into the LTDC. This mux is only
accessible through sysconfig registers which is not yet available in the
STM32MP25x common clock framework.
While waiting for a complete update of the c
