On Wed, 2015-11-18 at 18:34 +0100, Philipp Zabel wrote:
> The configurable hdmi_ref output of the PLL block is derived from
> the tvdpll_594m clock signal via a configurable PLL post-divider.
> It is used as the PLL reference input to the HDMI PHY module.
>
> Signed-off-by: Philipp Zabel
Acked-b
The configurable hdmi_ref output of the PLL block is derived from
the tvdpll_594m clock signal via a configurable PLL post-divider.
It is used as the PLL reference input to the HDMI PHY module.
Signed-off-by: Philipp Zabel
---
drivers/clk/mediatek/clk-mt8173.c | 5 +
include/dt-bindings