On 9/8/24 12:11 PM, Markus Elfring wrote:
> …
>> +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
>> @@ -0,0 +1,708 @@
> …
>> +static int dw_hdmi_qp_i2c_xfer(struct i2c_adapter *adap,
>> + struct i2c_msg *msgs, int num)
>> +{
> …
>> +mutex_lock(&i2c->lock);
> …
>> +
…
> +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c
> @@ -0,0 +1,708 @@
…
> +static int dw_hdmi_qp_i2c_xfer(struct i2c_adapter *adap,
> +struct i2c_msg *msgs, int num)
> +{
…
> + mutex_lock(&i2c->lock);
…
> + dw_hdmi_qp_mod(hdmi, 0, I2CM_OP_DONE_MASK_N | I2CM_
The Synopsys DesignWare HDMI 2.1 Quad-Pixel (QP) TX Controller IP
supports the following features, among others:
* Fixed Rate Link (FRL)
* Display Stream Compression (DSC)
* 4K@120Hz and 8K@60Hz video modes
* Variable Refresh Rate (VRR) including Quick Media Switching (QMS), aka
Cinema VRR
* Fas
