02.07.2020 15:36, Georgi Djakov пишет:
...
+ mc->provider.data = data;
+ mc->provider.xlate = of_icc_xlate_onecell;
+ mc->provider.aggregate = tegra_mc_icc_aggregate;
+
+ err = icc_provider_add(&mc->provider);
+ if (err)
+ goto err_msg;
>>>
>>> Nit:
Hi Dmitry,
On 7/2/20 02:36, Dmitry Osipenko wrote:
> 01.07.2020 20:12, Georgi Djakov пишет:
>> Hi Dmitry,
>>
>> Thank you for updating the patches!
>
> Hello, Georgi!
>
> Thank you for the review!
>
>> On 6/9/20 16:13, Dmitry Osipenko wrote:
>>> Now memory controller is a memory interconnection
Hi Dmitry,
Thank you for updating the patches!
On 6/9/20 16:13, Dmitry Osipenko wrote:
> Now memory controller is a memory interconnection provider. This allows us
> to use interconnect API in order to change memory configuration.
>
> Signed-off-by: Dmitry Osipenko
> ---
> drivers/memory/tegra
01.07.2020 20:12, Georgi Djakov пишет:
> Hi Dmitry,
>
> Thank you for updating the patches!
Hello, Georgi!
Thank you for the review!
> On 6/9/20 16:13, Dmitry Osipenko wrote:
>> Now memory controller is a memory interconnection provider. This allows us
>> to use interconnect API in order to cha
Now memory controller is a memory interconnection provider. This allows us
to use interconnect API in order to change memory configuration.
Signed-off-by: Dmitry Osipenko
---
drivers/memory/tegra/Kconfig | 1 +
drivers/memory/tegra/mc.c| 114 +++
drivers/mem
