On Tue, Oct 24, 2017 at 10:45 AM, Laurent Pinchart
wrote:
>> +static const struct vga_dac_info default_dac_variant = {
>> + /*
>> + * These DACs read data on the negative edge. For example in the
>> + * ADV7123 datasheet (revision D, page 8) there is a timing diagram
>> + * mak
Hi Linus,
Thank you for the patch.
On Friday, 20 October 2017 15:54:12 EEST Linus Walleij wrote:
> This extends the dumb VGA DAC bridge to handle the THS8134A
> and THS8134B VGA DACs in addition to those already handled.
>
> The THS8134A, THS8134B and as it turns out also THS8135 need to
> have
This extends the dumb VGA DAC bridge to handle the THS8134A
and THS8134B VGA DACs in addition to those already handled.
The THS8134A, THS8134B and as it turns out also THS8135 need to
have data clocked out at the negative edge of the clock pulse,
since they clock it into the DAC at the positive ed
