4717-3-xji%40analogixsemi.com
patch subject: [PATCH v3 3/3] drm/bridge:anx7625: Enable DSC feature
config: arm64-randconfig-002-20250415
(https://download.01.org/0day-ci/archive/20250415/202504152230.bcidpiru-...@intel.com/config)
compiler: aarch64-linux-gcc (GCC) 7.5.0
reproduce (this is a W=1 build
4K30(3840x2160 30Hz) timing pixel clock around 297M, for 24bits RGB
pixel data format, total transport bandwidth need 297M*24(at least
7.2Gbps) more than anx7625 mipi rx lane bandwidth(maximum 6Gbps,
4lanes, each lane 1.5Gbps). Without DSC function, anx7625 cannot
receive 4K30 video timing.
When d
