Hi Stephen,
On Fri, Apr 15, 2016 at 03:34:10PM -0700, Stephen Boyd wrote:
> > +static int sun4i_a10_display_reset_xlate(struct reset_controller_dev
> > *rcdev,
> > +const struct of_phandle_args *spec)
> > +{
> > + /* We only have a single reset signal */
> >
On 03/23, Maxime Ripard wrote:
> diff --git a/drivers/clk/sunxi/clk-sun4i-display.c
> b/drivers/clk/sunxi/clk-sun4i-display.c
> new file mode 100644
> index ..af7d1faebdec
> --- /dev/null
> +++ b/drivers/clk/sunxi/clk-sun4i-display.c
> @@ -0,0 +1,262 @@
> +#include
> +#include
> +#in
The A10 SoCs and its relatives has a special clock controller to drive the
display engines (both frontend and backend), that have a lot in common with
the clock to drive the first TCON channel.
Add a driver to support both.
Signed-off-by: Maxime Ripard
Acked-by: Rob Herring
---
Documentation/d
