> > > +/**
> > > + * @user_timestamp_frequency_hz: Timebase frequency for user
> timestamps
> > > + */
> > > +__u64 user_timestamp_frequency_hz;
> >
> > Why is this different? What are user timestamps and how are they different
> from GPU timestamps?
In v4, I've
> > > +struct drm_asahi_queue_create {
> > > +/** @flags: MBZ */
> > > +__u32 flags;
> > > +
> > > +/** @vm_id: The ID of the VM this queue is bound to */
> > > +__u32 vm_id;
> > > +
> > > +/** @queue_caps: Bitmask of DRM_ASAHI_QUEUE_CAP_* */
> > > +
> +/**
> + * @DRM_ASAHI_BIND_SINGLE_PAGE: Map a single page of the BO
> repeatedly
> + * across the VA range.
> + *
> + * This is useful to fill a VA range with scratch pages or zero
> pages.
> + * It is intended as a mechanism
> I'm good with this. There's a slim possibility that upstream may
> evolve in ways that make the current UAPI tricky to implement.
> However, given that it's based on prior art from the nouveau, Intel,
> and panfrost teams and that you've been shipping it in production for
> a while, I think that
On Fri, Mar 14, 2025 at 07:23:16PM -0400, Alyssa Rosenzweig wrote:
> This adds the UAPI for the Asahi driver targeting the GPU in the Apple
> M1 and M2 series systems on chip. The UAPI design is based on other
> modern Vulkan-capable drivers, including Xe and Panthor. Memory
> management is based o
Hi Alyssa,
>
+/**
+ * @DRM_ASAHI_BIND_SINGLE_PAGE: Map a single page of the BO
repeatedly
+ * across the VA range.
+ *
+ * This is useful to fill a VA range with scratch pages or zero
pages.
+ * It is intended as a mechanism t
> > > +/**
> > > + * enum drm_asahi_bind_op - Bind operation
> > > + */
> > > +enum drm_asahi_bind_op {
> > > +/** @DRM_ASAHI_BIND_OP_BIND: Bind a BO to a GPU VMA range */
> > > +DRM_ASAHI_BIND_OP_BIND = 0,
> > > +
> > > +/** @DRM_ASAHI_BIND_OP_UNBIND: Unbind a GP
> Since this is a deparature from our usual requirement that all pieces
> should be ready before landing anything we had discussion whether this is
> an acceptable one-off exception for special circumstance. Thanks a lot to
> Alyssa for driving this. The very much summarized consensus is that due t
On Thu, 20 Mar 2025 14:29:04 -0500 Faith Ekstrand wrote ---
> On Fri, 14 Mar 2025 18:23:16 -0500 Alyssa Rosenzweig wrote ---
>
> > This adds the UAPI for the Asahi driver targeting the GPU in the Apple
> > M1 and M2 series systems on chip. The UAPI design is based on other
On Fri, 14 Mar 2025 18:23:16 -0500 Alyssa Rosenzweig wrote ---
> This adds the UAPI for the Asahi driver targeting the GPU in the Apple
> M1 and M2 series systems on chip. The UAPI design is based on other
> modern Vulkan-capable drivers, including Xe and Panthor. Memory
> management
This adds the UAPI for the Asahi driver targeting the GPU in the Apple
M1 and M2 series systems on chip. The UAPI design is based on other
modern Vulkan-capable drivers, including Xe and Panthor. Memory
management is based on explicit VM management. Synchronization is
exclusively explicit sync.
Th
11 matches
Mail list logo
