Re: [PATCH v2 4/6] drm/panel: sitronix-st7789v: Clarify a definition

2023-06-18 Thread Maxime Ripard
On Fri, 16 Jun 2023 18:32:53 +0200, Miquel Raynal wrote: > The Sitronix datasheet explains BIT(1) of the RGBCTRL register as the > DOTCLK/PCLK edge used to sample the data lines: > > “0” The data is input on the positive edge of DOTCLK > “1” The data is input on the negative edge o

[PATCH v2 4/6] drm/panel: sitronix-st7789v: Clarify a definition

2023-06-16 Thread Miquel Raynal
The Sitronix datasheet explains BIT(1) of the RGBCTRL register as the DOTCLK/PCLK edge used to sample the data lines: “0” The data is input on the positive edge of DOTCLK “1” The data is input on the negative edge of DOTCLK IOW, this bit implies a falling edge and not a high state. Correc