On Tue, Nov 27, 2018 at 10:00:50PM -0800, Doug Anderson wrote:
> Hi,
>
> On Mon, Nov 26, 2018 at 3:12 PM Matthias Kaehlcke wrote:
> > @@ -409,8 +410,9 @@ static void dsi_pll_28nm_destroy(struct msm_dsi_pll
> > *pll)
> > static int pll_28nm_register(struct dsi_pll_28nm *pll_28nm)
> > {
> >
Hi,
On Mon, Nov 26, 2018 at 3:12 PM Matthias Kaehlcke wrote:
> @@ -409,8 +410,9 @@ static void dsi_pll_28nm_destroy(struct msm_dsi_pll *pll)
> static int pll_28nm_register(struct dsi_pll_28nm *pll_28nm)
> {
> char *clk_name, *parent_name, *vco_name;
> + const char *ref_clk_name =
Get the ref clock of the PHY from the device tree instead of
hardcoding its name and rate.
Signed-off-by: Matthias Kaehlcke
---
Changes in v2:
- patch added to the series
---
drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c | 17 ++---
1 file changed, 14 insertions(+), 3 deletions(-)
