Re: [PATCH v2 1/9] gpu: ipu-v3: add DT binding for the Prefetch Resolve Engine

On Wed, 2017-03-08 at 12:13 +0100, Lucas Stach wrote: > The Prefetch Resolve Engine is a prefetch and tile resolve engine > which prefetches display data from DRAM to an internal SRAM region. > It has a single clock for configuration register access and the > functional units. A single shared inter

[PATCH v2 1/9] gpu: ipu-v3: add DT binding for the Prefetch Resolve Engine

The Prefetch Resolve Engine is a prefetch and tile resolve engine which prefetches display data from DRAM to an internal SRAM region. It has a single clock for configuration register access and the functional units. A single shared interrupt is used for status and error signaling. The only externa