[PATCH v2 1/5] drm/xe/bo: fix alignment with non-4KiB kernel page sizes

2025-06-12 Thread Mingcong Bai via B4 Relay
From: Mingcong Bai The bo/ttm interfaces with kernel memory mapping from dedicated GPU memory. It is not correct to assume that SZ_4K would suffice for page alignment as there are a few hardware platforms that commonly uses non- 4KiB pages - for instance, 16KiB is the most commonly used kernel pa

[PATCH v2 1/5] drm/xe/bo: fix alignment with non-4KiB kernel page sizes

2025-06-03 Thread Mingcong Bai via B4 Relay
From: Mingcong Bai The bo/ttm interfaces with kernel memory mapping from dedicated GPU memory. It is not correct to assume that SZ_4K would suffice for page alignment as there are a few hardware platforms that commonly uses non- 4KiB pages - for instance, 16KiB is the most commonly used kernel pa