Hi Joonyoung,
2015-06-12 Joonyoung Shim :
> The reason waiting vblank is to be power gated and disabled clocks after
> dma operation is completed. The dma operation is stopped already before
> be power gated and clocks are disabled when mixer is disabled by commit
> 381be025ac1a6("drm/exynos: sto
The reason waiting vblank is to be power gated and disabled clocks after
dma operation is completed. The dma operation is stopped already before
be power gated and clocks are disabled when mixer is disabled by commit
381be025ac1a6("drm/exynos: stop mixer before gating clocks during
poweroff"). Don'