On Fri, 11 Aug 2023 15:13:23 +0100
Steven Price wrote:
> > +#define AS_TRANSCFG_LO(as) (MMU_AS(as) + 0x30)
> > +#define AS_TRANSCFG_HI(as) (MMU_AS(as) + 0x34)
> > +#define AS_TRANSCFG_ADRMODE_LEGACY (0 << 0)
>
> I don't be
On 09/08/2023 17:53, Boris Brezillon wrote:
> Those are the registers directly accessible through the MMIO range.
>
> FW registers are exposed in panthor_fw.h.
>
> v2:
> - Rename the driver (pancsf -> panthor)
> - Change the license (GPL2 -> MIT + GPL2)
> - Split the driver addition commit
>
> S
Those are the registers directly accessible through the MMIO range.
FW registers are exposed in panthor_fw.h.
v2:
- Rename the driver (pancsf -> panthor)
- Change the license (GPL2 -> MIT + GPL2)
- Split the driver addition commit
Signed-off-by: Boris Brezillon
---
drivers/gpu/drm/panthor/pant
