Re: [PATCH v2] drm/msm/dpu: improve DSC allocation

2023-12-04 Thread Dmitry Baryshkov
On Tue, 5 Dec 2023 at 01:55, Kuogee Hsieh wrote: > > A DCE (Display Compression Engine) contains two DSC hard slice > encoders. Each DCE start with even DSC encoder index followed by > an odd DSC encoder index. Each encoder can work independently. > But Only two DSC encoders from same DCE can be p

[PATCH v2] drm/msm/dpu: improve DSC allocation

2023-12-04 Thread Kuogee Hsieh
A DCE (Display Compression Engine) contains two DSC hard slice encoders. Each DCE start with even DSC encoder index followed by an odd DSC encoder index. Each encoder can work independently. But Only two DSC encoders from same DCE can be paired to work together to support merge mode. In addition, t