Similar to commit ("drm/amdgpu: fix IH overflow on Vega10 v2").
When an ring buffer overflow happens the appropriate bit is set in the WPTR
register which is also written back to memory. But clearing the bit in the
WPTR doesn't trigger another memory writeback.
So what can happen is that we end up
On Tue, Jan 5, 2021 at 11:49 AM Christian König
wrote:
>
> Am 05.01.21 um 17:06 schrieb Defang Bo:
> > Similar to commit ("drm/amdgpu: fix IH overflow on Vega10
> > v2").
> > When an ring buffer overflow happens the appropriate bit is set in the WPTR
> > register which is also written back to mem
Am 05.01.21 um 17:06 schrieb Defang Bo:
Similar to commit ("drm/amdgpu: fix IH overflow on Vega10 v2").
When an ring buffer overflow happens the appropriate bit is set in the WPTR
register which is also written back to memory. But clearing the bit in the
WPTR doesn't trigger another memory writeb
