Re: [PATCH v2] drm/amd/display: Reduce HDMI pixel encoding if max clock is exceeded

2020-01-06 Thread Alex Deucher
On Thu, Jan 2, 2020 at 10:14 AM Harry Wentland wrote: > > On 2019-12-02 4:47 p.m., Thomas Anderson wrote: > > For high-res (8K) or HFR (4K120) displays, using uncompressed pixel > > formats like YCbCr444 would exceed the bandwidth of HDMI 2.0, so the > > "interesting" modes would be disabled, leav

Re: [PATCH v2] drm/amd/display: Reduce HDMI pixel encoding if max clock is exceeded

2020-01-02 Thread Harry Wentland
On 2019-12-02 4:47 p.m., Thomas Anderson wrote: > For high-res (8K) or HFR (4K120) displays, using uncompressed pixel > formats like YCbCr444 would exceed the bandwidth of HDMI 2.0, so the > "interesting" modes would be disabled, leaving only low-res or low > framerate modes. > > This change lower

Re: [PATCH v2] drm/amd/display: Reduce HDMI pixel encoding if max clock is exceeded

2019-12-23 Thread Tom Anderson
Ping. Is there any action required to get this landed? On Tue, Dec 10, 2019 at 10:59:24AM -0800, Tom Anderson wrote: > Friendly ping. > > On Mon, Dec 02, 2019 at 01:47:13PM -0800, Thomas Anderson wrote: > > For high-res (8K) or HFR (4K120) displays, using uncompressed pixel > > formats like YCbC

Re: [PATCH v2] drm/amd/display: Reduce HDMI pixel encoding if max clock is exceeded

2019-12-20 Thread Alex Deucher
On Fri, Dec 20, 2019 at 10:10 AM Tom Anderson wrote: > > Ping. Is there any action required to get this landed? Looks good to me, but I'd like to hear from the display guys. Alex > > On Tue, Dec 10, 2019 at 10:59:24AM -0800, Tom Anderson wrote: > > Friendly ping. > > > > On Mon, Dec 02, 2019

[PATCH v2] drm/amd/display: Reduce HDMI pixel encoding if max clock is exceeded

2019-12-03 Thread Thomas Anderson
For high-res (8K) or HFR (4K120) displays, using uncompressed pixel formats like YCbCr444 would exceed the bandwidth of HDMI 2.0, so the "interesting" modes would be disabled, leaving only low-res or low framerate modes. This change lowers the pixel encoding to 4:2:2 or 4:2:0 if the max TMDS clock