Re: [PATCH v1 2/5] drm/msm/dpu: separate DSC flush update out of interface

On 21/04/2023 02:25, Kuogee Hsieh wrote: Current DSC flush update is piggyback inside dpu_hw_ctl_intf_cfg_v1(). This patch separate DSC flush away from dpu_hw_ctl_intf_cfg_v1() by adding dpu_hw_ctl_update_pending_flush_dsc_v1() to handle both per DSC engine and DSC flush bits at same time to make

[PATCH v1 2/5] drm/msm/dpu: separate DSC flush update out of interface

Current DSC flush update is piggyback inside dpu_hw_ctl_intf_cfg_v1(). This patch separate DSC flush away from dpu_hw_ctl_intf_cfg_v1() by adding dpu_hw_ctl_update_pending_flush_dsc_v1() to handle both per DSC engine and DSC flush bits at same time to make it consistent with the location of flush p