On 10/10/2023 10:10, Marijn Suijten wrote:
On 2023-10-09 18:36:11, Neil Armstrong wrote:
Starting with the SM8550 platform, the SSPP & WB Clock Controls are
no more in the MDP TOP registers, but in the SSPP & WB register space.
Add the corresponding SSPP & WB ops and use them from the vbif QoS
On 2023-10-09 18:36:11, Neil Armstrong wrote:
> Starting with the SM8550 platform, the SSPP & WB Clock Controls are
> no more in the MDP TOP registers, but in the SSPP & WB register space.
>
> Add the corresponding SSPP & WB ops and use them from the vbif QoS
> and OT limit setup functions.
>
> S
Starting with the SM8550 platform, the SSPP & WB Clock Controls are
no more in the MDP TOP registers, but in the SSPP & WB register space.
Add the corresponding SSPP & WB ops and use them from the vbif QoS
and OT limit setup functions.
Signed-off-by: Neil Armstrong
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Neil Armstrong (5):
