Re: [PATCH RFC] drm/msm/dpu: Fall back to a single DSC encoder (1:1:1) on small SoCs

On 2025-01-21 16:58:24, Luca Weiss wrote: > Hi Marijn, > > On Tue Jan 21, 2025 at 12:06 AM CET, Marijn Suijten wrote: > > Some SoCs such as SC7280 (used in the FairPhone 5) have only a single > > DSC "hard slice" encoder. The current hardcoded use of 2:2:1 topology > > (2 LM and 2 DSC for a singl

Re: [PATCH RFC] drm/msm/dpu: Fall back to a single DSC encoder (1:1:1) on small SoCs

Hi Marijn, On Tue Jan 21, 2025 at 12:06 AM CET, Marijn Suijten wrote: > Some SoCs such as SC7280 (used in the FairPhone 5) have only a single > DSC "hard slice" encoder. The current hardcoded use of 2:2:1 topology > (2 LM and 2 DSC for a single interface) make it impossible to use > Display Strea

Re: [PATCH RFC] drm/msm/dpu: Fall back to a single DSC encoder (1:1:1) on small SoCs

On Tue, Jan 21, 2025 at 12:06:15AM +0100, Marijn Suijten wrote: > Some SoCs such as SC7280 (used in the FairPhone 5) have only a single > DSC "hard slice" encoder. The current hardcoded use of 2:2:1 topology > (2 LM and 2 DSC for a single interface) make it impossible to use > Display Stream Compr

[PATCH RFC] drm/msm/dpu: Fall back to a single DSC encoder (1:1:1) on small SoCs

Some SoCs such as SC7280 (used in the FairPhone 5) have only a single DSC "hard slice" encoder. The current hardcoded use of 2:2:1 topology (2 LM and 2 DSC for a single interface) make it impossible to use Display Stream Compression panels with mainline, which is exactly what's installed on the Fa