Re: [PATCH 4/4] drm/v3d: Fix and extend MMU error handling.

2019-04-19 Thread Paul Kocialkowski
Hi, On Thu, 2019-04-18 at 17:10 -0700, Eric Anholt wrote: > We were setting the wrong flags to enable PTI errors, so we were > seeing reads to invalid PTEs show up as write errors. Also, we > weren't turning on the interrupts. The AXI IDs we were dumping > included the outstanding write number a

[PATCH 4/4] drm/v3d: Fix and extend MMU error handling.

2019-04-18 Thread Eric Anholt
We were setting the wrong flags to enable PTI errors, so we were seeing reads to invalid PTEs show up as write errors. Also, we weren't turning on the interrupts. The AXI IDs we were dumping included the outstanding write number and so they looked basically random. And the VIO_ADDR decoding was