From: Dave Airlie
Logical ports are never going to have EDID changes,
they are used for the internal ports on MST monitors.
We cache the EDIDs from these to save time at MST probe.
v2: drop misplace tile property line, meant for other patch.
Signed-off-by: Dave Airlie
---
drivers/gpu/drm/drm
On 22 October 2014 19:06, Daniel Vetter wrote:
> On Wed, Oct 22, 2014 at 12:32:04PM +1000, Dave Airlie wrote:
>> From: Dave Airlie
>>
>> Logical ports are never going to have EDID changes,
>> they are used for the internal ports on MST monitors.
>>
>> We cache the EDIDs from these to save time at
From: Dave Airlie
Logical ports are never going to have EDID changes,
they are used for the internal ports on MST monitors.
We cache the EDIDs from these to save time at MST probe.
Signed-off-by: Dave Airlie
---
drivers/gpu/drm/drm_dp_mst_topology.c | 20 ++--
drivers/gpu/drm/
On Wed, Oct 22, 2014 at 12:32:04PM +1000, Dave Airlie wrote:
> From: Dave Airlie
>
> Logical ports are never going to have EDID changes,
> they are used for the internal ports on MST monitors.
>
> We cache the EDIDs from these to save time at MST probe.
>
> Signed-off-by: Dave Airlie
> ---
>
From: Dave Airlie
Logical ports are never going to have EDID changes,
they are used for the internal ports on MST monitors.
We cache the EDIDs from these to save time at MST probe.
Signed-off-by: Dave Airlie
---
drivers/gpu/drm/drm_dp_mst_topology.c | 20 ++--
drivers/gpu/drm/