On 10/31/2022 5:55 AM, Tvrtko Ursulin wrote:
On 28/10/2022 18:00, Ceraolo Spurio, Daniele wrote:
On 10/28/2022 1:38 AM, Tvrtko Ursulin wrote:
On 27/10/2022 23:15, Daniele Ceraolo Spurio wrote:
The GSC CS re-uses the same interrupt bits that the GSC used in older
platforms. This means that
On 28/10/2022 18:00, Ceraolo Spurio, Daniele wrote:
On 10/28/2022 1:38 AM, Tvrtko Ursulin wrote:
On 27/10/2022 23:15, Daniele Ceraolo Spurio wrote:
The GSC CS re-uses the same interrupt bits that the GSC used in older
platforms. This means that we can now have an engine interrupt coming
out
On 10/28/2022 1:38 AM, Tvrtko Ursulin wrote:
On 27/10/2022 23:15, Daniele Ceraolo Spurio wrote:
The GSC CS re-uses the same interrupt bits that the GSC used in older
platforms. This means that we can now have an engine interrupt coming
out of OTHER_CLASS, so we need to handle that appropriat
On 27/10/2022 23:15, Daniele Ceraolo Spurio wrote:
The GSC CS re-uses the same interrupt bits that the GSC used in older
platforms. This means that we can now have an engine interrupt coming
out of OTHER_CLASS, so we need to handle that appropriately.
Signed-off-by: Daniele Ceraolo Spurio
Cc:
On Thu, Oct 27, 2022 at 03:15:52PM -0700, Daniele Ceraolo Spurio wrote:
> The GSC CS re-uses the same interrupt bits that the GSC used in older
> platforms. This means that we can now have an engine interrupt coming
> out of OTHER_CLASS, so we need to handle that appropriately.
>
> Signed-off-by:
The GSC CS re-uses the same interrupt bits that the GSC used in older
platforms. This means that we can now have an engine interrupt coming
out of OTHER_CLASS, so we need to handle that appropriately.
Signed-off-by: Daniele Ceraolo Spurio
Cc: Matt Roper
---
drivers/gpu/drm/i915/gt/intel_gt_irq.
