Am 2021-08-26 14:10, schrieb Michael Walle:
The STLB and the first command buffer (which is used to set up the
TLBs)
has a 32 bit size restriction in hardware. There seems to be no way to
specify addresses larger than 32 bit. Keep it simple and restict the
addresses to the lower 4 GiB range for
On Thu, Aug 26, 2021 at 02:10:06PM +0200, Michael Walle wrote:
> - pdev->dev.coherent_dma_mask = DMA_BIT_MASK(40);
> - pdev->dev.dma_mask = &pdev->dev.coherent_dma_mask;
> + /*
> + * PTA and MTLB can have 40 bit base addresses, but
> + * unfortunately, an entry in the MTLB can
Am 2021-08-26 14:19, schrieb Russell King (Oracle):
On Thu, Aug 26, 2021 at 02:10:06PM +0200, Michael Walle wrote:
- pdev->dev.coherent_dma_mask = DMA_BIT_MASK(40);
- pdev->dev.dma_mask = &pdev->dev.coherent_dma_mask;
+ /*
+* PTA and MTLB can have 40 bit base addresses,
The STLB and the first command buffer (which is used to set up the TLBs)
has a 32 bit size restriction in hardware. There seems to be no way to
specify addresses larger than 32 bit. Keep it simple and restict the
addresses to the lower 4 GiB range for all coherent DMA memory
allocations.
Signed-of
